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LM3S8971-IGZ20-A2T Datasheet(PDF) 11 Page - Texas Instruments |
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LM3S8971-IGZ20-A2T Datasheet(HTML) 11 Page - Texas Instruments |
11 / 638 page List of Tables Table 1. Revision History .................................................................................................. 21 Table 2. Documentation Conventions ................................................................................ 27 Table 3-1. Memory Map ....................................................................................................... 53 Table 4-1. Exception Types .................................................................................................. 55 Table 4-2. Interrupts ............................................................................................................ 56 Table 5-1. JTAG Port Pins Reset State ................................................................................. 60 Table 5-2. JTAG Instruction Register Commands ................................................................... 65 Table 6-1. Clock Source Options .......................................................................................... 75 Table 6-2. Possible System Clock Frequencies Using the SYSDIV Field ................................. 78 Table 6-3. Examples of Possible System Clock Frequencies Using the SYSDIV2 Field ............ 78 Table 6-4. System Control Register Map ............................................................................... 82 Table 6-5. RCC2 Fields that Override RCC fields .................................................................. 97 Table 7-1. Hibernation Module Register Map ....................................................................... 141 Table 8-1. Flash Protection Policy Combinations ................................................................. 156 Table 8-2. User-Programmable Flash Memory Resident Registers ....................................... 158 Table 8-3. Flash Register Map ............................................................................................ 159 Table 9-1. GPIO Pad Configuration Examples ..................................................................... 185 Table 9-2. GPIO Interrupt Configuration Example ................................................................ 185 Table 9-3. GPIO Register Map ........................................................................................... 187 Table 10-1. Available CCP Pins ............................................................................................ 224 Table 10-2. 16-Bit Timer With Prescaler Configurations ......................................................... 227 Table 10-3. Timers Register Map .......................................................................................... 233 Table 11-1. Watchdog Timer Register Map ............................................................................ 261 Table 12-1. Samples and FIFO Depth of Sequencers ............................................................ 284 Table 12-2. Differential Sampling Pairs ................................................................................. 286 Table 12-3. ADC Register Map ............................................................................................. 290 Table 13-1. UART Register Map ........................................................................................... 326 Table 14-1. SSI Register Map .............................................................................................. 371 Table 15-1. CAN Protocol Ranges ........................................................................................ 412 Table 15-2. CANBIT Register Values .................................................................................... 412 Table 15-3. CAN Register Map ............................................................................................. 416 Table 16-1. TX & RX FIFO Organization ............................................................................... 449 Table 16-2. Ethernet Register Map ....................................................................................... 455 Table 17-1. Internal Reference Voltage and ACREFCTL Field Values ..................................... 495 Table 17-2. Analog Comparators Register Map ..................................................................... 496 Table 18-1. PWM Register Map ............................................................................................ 510 Table 19-1. QEI Register Map .............................................................................................. 546 Table 21-1. Signals by Pin Number ....................................................................................... 561 Table 21-2. Signals by Signal Name ..................................................................................... 565 Table 21-3. Signals by Function, Except for GPIO ................................................................. 569 Table 21-4. GPIO Pins and Alternate Functions ..................................................................... 572 Table 21-5. Signals by Pin Number ....................................................................................... 573 Table 21-6. Signals by Signal Name ..................................................................................... 577 Table 21-7. Signals by Function, Except for GPIO ................................................................. 581 Table 21-8. GPIO Pins and Alternate Functions ..................................................................... 585 Table 21-9. Connections for Unused Signals (100-pin LQFP) ................................................. 586 11 June 23, 2010 Texas Instruments-Production Data Stellaris® LM3S8971 Microcontroller |
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