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LM3S9B90-EQC80-C1T Datasheet(PDF) 5 Page - Texas Instruments |
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LM3S9B90-EQC80-C1T Datasheet(HTML) 5 Page - Texas Instruments |
5 / 1185 page 8.6 Memory Register Descriptions (System Control Offset) .................................................. 249 9 Micro Direct Memory Access (μDMA) ................................................................ 267 9.1 Block Diagram ............................................................................................................ 268 9.2 Functional Description ................................................................................................. 268 9.2.1 Channel Assignments .................................................................................................. 269 9.2.2 Priority ........................................................................................................................ 270 9.2.3 Arbitration Size ............................................................................................................ 270 9.2.4 Request Types ............................................................................................................ 270 9.2.5 Channel Configuration ................................................................................................. 271 9.2.6 Transfer Modes ........................................................................................................... 273 9.2.7 Transfer Size and Increment ........................................................................................ 281 9.2.8 Peripheral Interface ..................................................................................................... 281 9.2.9 Software Request ........................................................................................................ 281 9.2.10 Interrupts and Errors .................................................................................................... 282 9.3 Initialization and Configuration ..................................................................................... 282 9.3.1 Module Initialization ..................................................................................................... 282 9.3.2 Configuring a Memory-to-Memory Transfer ................................................................... 282 9.3.3 Configuring a Peripheral for Simple Transmit ................................................................ 284 9.3.4 Configuring a Peripheral for Ping-Pong Receive ............................................................ 285 9.3.5 Configuring Channel Assignments ................................................................................ 288 9.4 Register Map .............................................................................................................. 288 9.5 μDMA Channel Control Structure ................................................................................. 289 9.6 μDMA Register Descriptions ........................................................................................ 296 10 General-Purpose Input/Outputs (GPIOs) ........................................................... 325 10.1 Signal Description ....................................................................................................... 325 10.2 Functional Description ................................................................................................. 329 10.2.1 Data Control ............................................................................................................... 331 10.2.2 Interrupt Control .......................................................................................................... 332 10.2.3 Mode Control .............................................................................................................. 333 10.2.4 Commit Control ........................................................................................................... 333 10.2.5 Pad Control ................................................................................................................. 334 10.2.6 Identification ............................................................................................................... 334 10.3 Initialization and Configuration ..................................................................................... 334 10.4 Register Map .............................................................................................................. 335 10.5 Register Descriptions .................................................................................................. 338 11 External Peripheral Interface (EPI) ..................................................................... 381 11.1 EPI Block Diagram ...................................................................................................... 382 11.2 Signal Description ....................................................................................................... 383 11.3 Functional Description ................................................................................................. 385 11.3.1 Non-Blocking Reads .................................................................................................... 386 11.3.2 DMA Operation ........................................................................................................... 387 11.4 Initialization and Configuration ..................................................................................... 387 11.4.1 SDRAM Mode ............................................................................................................. 388 11.4.2 Host Bus Mode ........................................................................................................... 392 11.4.3 General-Purpose Mode ............................................................................................... 401 11.5 Register Map .............................................................................................................. 409 11.6 Register Descriptions .................................................................................................. 410 5 June 14, 2010 Texas Instruments-Advance Information Stellaris® LM3S9B90 Microcontroller |
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