NCP5389MNR2G datasheet(6/28 Pages) ONSEMI

Part #	NCP5389MNR2G

Description	2/3 Phase Buck Controller for VR11 Pentium IV Processor Applications

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Manufacturer	ONSEMI [ON Semiconductor]

Direct Link	http://www.onsemi.com

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NCP5389

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6

PIN DESCRIPTIONS

Pin No.

Symbol

Description

1 − 8

VID0–VID7

Voltage ID DAC inputs.

9

EN

Pull this pin high to enable controller. Pull this pin low to disable controller. Either an open−collector output

(with a pull−up resistor) or a logic gate (CMOS or totem−pole output) may be used to drive this pin. A Low to

High transition on this pin will initiate a soft start. If the Enable function is not required, this pin should be tied

directly to VREF.

10

SS

A capacitor from this pin to ground programs the soft−start time.

11

VS+

Non−inverting input to the internal differential remote VCORE sense amplifier.

12

VS−

Inverting input to the internal differential remote VCORE sense amplifier.

13

DIFFOUT

Output of the differential remote sense amplifier.

14

COMP

Output of the error amplifier.

15

VFB

Error amplifier inverting input. Connect a resistor from this pin to DIFFOUT. The value of this resistor and the

amount of current from the droop resistor (RDRP) will set the amount of output voltage droop (AVP) during

load.

16

VDRP

Current signal output for Adaptive Voltage Positioning (AVP). The voltage of this pin minus 1.3 V is

proportional to the output current. Connect a resistor from this pin to VFB to set the amount of AVP current

into the feedback resistor (RFB) to produce an output voltage droop. Leave this pin open for no AVP.

17,19,21

CSxN

Inverting input to current sense amplifier #x, x = 1, 2, 3

18,20,22

CSx

Non−inverting input to current sense amplifier #x, x = 1, 2, 3

23

DRVON

Gate Driver enable output. This pin produces a logic HIGH to enable gate drivers and a logic LOW to disable

gate drivers and has an internal 70 kW to ground.

24,25,26

G1 – G3

PWM control signal outputs to gate drivers.

27

DGND

Power supply return for the digital circuits. Connect to AGND.

28

VCC

Power for the internal control circuits.

29

VR_RDY

Voltage Regulator Ready (PowerGood) output. Open drain type output with internal delays that will transition

High when VCORE is higher than 300 mV below DAC, Low when VCORE is lower than 380 mV below DAC,

and Low when VCORE is higher than DAC+185 mV. This output is latched Low if VCORE exceeds DAC+185

mV until VCC is removed.

30

ROSC

A resistance from this pin to ground programs the oscillator frequency. Also, this pin supplies a regulated

2.0 V which may be used with a voltage divider to the ILIM pin to set the over current shutdown threshold as

shown in the Applications Schematics.

31

ROSC2

Use for enhanced performance.

32

ILIM

Over current shutdown threshold. To program the shutdown threshold, connect this pin to the ROSC pin via a

resistor divider as shown in the Applications Schematics. To disable the over current feature connect this pin

directly to the ROSC pin. To guarantee correct operation, this pin should only be connected to the voltage

generated by the ROSC pin – do not connect this pin to any externally generated voltages.

33

THPAD/

AGND

Copper pad on the bottom of the IC for heatsinking. This pin should be connected to the ground plane under

the IC. Power supply return for the analog circuits that control output voltage.

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