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NP5Q128A13ESFC0E Datasheet(PDF) 7 Page - Numonyx B.V |
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NP5Q128A13ESFC0E Datasheet(HTML) 7 Page - Numonyx B.V |
7 / 56 page Numonyx® Omneo™ P5Q Datasheet Description 7/56 1.2 Product Description The Omneo™ P5Q PCM s a 128-Mbit (16 Mb x 8) SPI phase change memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus. Omneo™ P5Q PCM product supports four new, high-performance dual and quad input/output instructions: – Dual output fast read (DOFR) instruction used to read data at up to 66 MHz by using both DQ0 and DQ1 pins as outputs – Quad output fast read (QOFR) instruction used to read data at up to 50 MHz by using DQ0, DQ1, DQ2(W) and DQ3(HOLD) pins as outputs – Dual input fast program (DIFP) instruction used to program data at up to 66 MHz by using both DQ0 and DQ1 pins as inputs – Quad input fast program (QIFP) instruction used to program data at up to 50 MHz by using DQ0, DQ1, DQ2(W) and DQ3(HOLD) pins as inputs These new instructions double or quadruple the transfer bandwidth for read and program operations. The memory can be programmed 1 to 64 bytes at a time, using the page program, dual input fast program and quad input fast program instructions. The memory is organized as 128 sectors that are further divided into 1,024 pages each (131,072 pages in total). For compatibility with flash memory devices, Omneo™ P5Q PCM supports sector erase (128-Kbyte sector) and bulk erase instructions. It can be write protected by software using a mix of volatile and non-volatile protection features, depending on the application needs. The protection granularity is of 128 Kbytes (sector granularity). |
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