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NCP3125ADR2G Datasheet(PDF) 9 Page - ON Semiconductor

Part # NCP3125ADR2G
Description  4 A Synchronous PWM Switching Converter
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCP3125ADR2G Datasheet(HTML) 9 Page - ON Semiconductor

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NCP3125
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9
Current Limit Protection
In case of a short circuit or overload, the low−side (LS)
FET will conduct large currents. The regulator will latch off,
protecting the load and MOSFETs from excessive heat and
damage. Low−side RDS(on) sense is implemented at the end
of each LS−FET turn−on duration to sense the current.
While the low side MOSFET is on, the VSW voltage is
compared to the user set internally generated OCP trip
voltage. If the VSW voltage is lower than OCP trip voltage,
an overcurrent condition occurs and a counter counts
consecutive current trips. If the counter reaches 7, the PWM
logic and both HS−FET and LS−FET are turned off. The
regulator has to go through a Power On Reset (POR) cycle
to reset the OCP fault as shown in Figure 20.
BG
VOCTH
Current
Flow
0V
VOCTH
PHASE
Low Side
MOSFET
Current
BG
Drive
Figure 20. Current Limit Trip
APPLICATION SECTION
Design Procedure
When starting the design of a buck regulator, it is
important to collect as much information as possible about
the behavior of the input and output before starting the
design.
ON Semiconductor has a Microsoft Excel
® based design
tool available online under the design tools section of the
NCP3125 product page. The tool allows you to capture your
design point and optimize the performance of your regulator
based on your design criteria.
Table 4. DESIGN PARAMETERS
Design Parameter
Example Value
Input voltage
(VIN)
10.8 V to 13.2 V
Output voltage
(VOUT)
3.3 V
Input ripple voltage
(VINRIPPLE)
300 mV
Output ripple voltage
(VOUTRIPPLE)
60 mV
Output current rating
(IOUT)
4 A
Operating frequency
(FSW)
350 kHz
The buck converter produces input voltage VIN pulses that
are LC filtered to produce a lower DC output voltage VOUT.
The output voltage can be changed by modifying the on time
relative to the switching period T or switching frequency.
The ratio of high side switch on time to the switching period
is called duty ratio D. Duty ratio can also be calculated using
VOUT, VIN, the Low Side Switch Voltage Drop VLSD, and
the High Side Switch Voltage Drop VHSD.
FSW + 1T
(eq. 2)
D +
TON
T
and (1 * D) +
TOFF
T
(eq. 3)
D +
VOUT ) VLSD
VIN * VHSD ) VLSD
[ D +
VOUT
VIN
³ 27.5% +
3.3 V
12 V
(eq. 4)
D
= Duty cycle
FSW
= Switching frequency
T
= Switching period
TOFF
= High side switch off time
TON
= High side switch on time
VHSD
= High side switch voltage drop
VIN
= Input voltage
VLSD
= Low side switch voltage drop
VOUT
= Output voltage
Inductor Selection
When selecting an inductor, the designer can employ a
rule of thumb for the design where the percentage of ripple
current in the inductor should be between 10% and 40%.
When using ceramic output capacitors, the ripple current can
be greater because the ESR of the output capacitor is smaller,
thus a user might select a higher ripple current. However,


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