NCP1509

http://onsemi.com

2

Figure 3. Simplified Block Diagram

+

−

−

+

+

−

+

−

+

−

+

−

FB

GNDA

CB0

CB1

SHD

ISENS

ISENS

SENFET

ILIM

ZCL

MODE SELECTION

SYNC DETECT

AND

TIMING BLOCK

SYNC DETECT

AND

TIMING BLOCK

THERMAL

SHUTDOWN

ENABLE

DETECT

SELECT

LOGIC

BANDGAP

REFERENCE

AND SOFT

START

PWM

OVP

PM

CMP

CMP

CMP

CMP

CMP

OA

Q2

Q1

DVR

DVR

COMPENSATION

RAMP

CONTROL

BLOCK

(PWM,PM)

GNDP

SYNC

LX

VCCA

VCCP

FB

DAMPING

SWITCHING

CONTROL

DAMPING

SWITCHING

CONTROL

2

10

6

3

4

5

6

1

7

8

9

PIN FUNCTION DESCRIPTION

Pin

Number

Name

Type

Description

1

GNDA

Analog GND

Ground connection for the Analog Section of the IC. This is the GND for the FB, SYNC,

CB0, CB1, PG and ENABLE pins.

2

GNDP

Power GND

Ground connection for the N−FET Power Stage.

3

LX

Power Output

Connection from Power MOSFETs to the Inductor.

4

VCCP

Power Input

Power Supply Input for the Switching P−FET.

5

VCCA

Power Input

Power Supply Input for the Analog Section of the IC.

6

FB

Analog Input

Feedback voltage from the output of the power supply.

7

CB0

Analog Input

8

CB1

Analog Input

9

SHD

Analog Input

Enable for Switching Regulator. This pin is active high to turn on the NCP1509. This pin

contains an internal pulldown resistor.

10

SYNC

Analog Input

Synchronization input for the PWM converter. If a clock signal is present, the converter

uses the rising edge for the turn on of the PFET. If this pin is low, the converter is in Low

Iq Pulse mode. If this pin is high, the converter uses the internal oscillator for the PWM

mode. This pin has an internal pulldown resistor to force the operation into the Pulse

mode.