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NCL30000DR2G Datasheet(PDF) 2 Page - ON Semiconductor |
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NCL30000DR2G Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 23 page NCL30000 http://onsemi.com 2 + Figure 1. Block Diagram E/A Demag UVP Fault LEB 195 ns* Off Timer Reset PWM R Q S (Enable EA) DRV Q All SR Latches are Reset Dominant ZCD Clamp OVP VCC DRV GND mVDD VCC MFP ZCD Ct CS COMP + + − VOVP − + VUVP RMFP VREF + gm − + VControl R Q S Q R Q S Q R Q S Q VZCD(TRIG) − + + VZCD(ARM) + + − + − + VDD Add Ct Offset 275 mA* VEAH Clamp − + 180 ms* VCC Management VDD Power Good mVDD OCP VILIM * Typical Values Shown |
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