MTB50P03HDLT4G datasheet(2/9 Pages) ONSEMI

Part #	MTB50P03HDLT4G

Description	Power MOSFET 50 Amps, 30 Volts, Logic Level P?묬hannel D2PAK

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Manufacturer	ONSEMI [ON Semiconductor]

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MTB50P03HDL

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ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)

Characteristic

Symbol

Min

Typ

Max

Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

(Cpk ≥ 2.0) (Note 3)

(VGS = 0 Vdc, ID = 250 mAdc)

Temperature Coefficient (Positive)

V(BR)DSS

30

−

26

−

Vdc

mV/

°C

Zero Gate Voltage Drain Current

(VDS = 30 Vdc, VGS = 0 Vdc)

(VDS = 30 Vdc, VGS = 0 Vdc, TJ = 125°C)

IDSS

−

1.0

10

mAdc

Gate−Body Leakage Current

(VGS = ±15 Vdc, VDS = 0 Vdc)

IGSS

−

100

nAdc

ON CHARACTERISTICS (Note 1)

Gate Threshold Voltage

(Cpk ≥ 3.0) (Note 3)

(VDS = VGS, ID = 250 mAdc)

Threshold Temperature Coefficient (Negative)

VGS(th)

1.0

−

1.5

4.0

2.0

−

Vdc

mV/

°C

Static Drain−Source On−Resistance

(Cpk ≥ 3.0) (Note 3)

(VGS = 5.0 Vdc, ID = 25 Adc)

RDS(on)

−

20.9

25

m

W

Drain−Source On−Voltage (VGS = 5.0 Vdc)

(ID = 50 Adc)

(ID = 25 Adc, TJ =125°C)

VDS(on)

−

0.83

−

1.5

1.3

Vdc

Forward Transconductance

(VDS = 5.0 Vdc, ID = 25 Adc)

gFS

15

20

−

mhos

DYNAMIC CHARACTERISTICS

Input Capacitance

(VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz)

Ciss

−

3500

4900

pF

Output Capacitance

Coss

−

1550

2170

Transfer Capacitance

Crss

−

550

770

SWITCHING CHARACTERISTICS (Note 2)

Turn−On Delay Time

(VDD= 15 Vdc, ID = 50 Adc,

VGS = 5.0 Vdc, RG = 2.3 W)

td(on)

−

22

30

ns

Rise Time

tr

−

340

466

Turn−Off Delay Time

td(off)

−

90

117

Fall Time

tf

−

218

300

Gate Charge (See Figure 8)

(VDS = 24 Vdc, ID = 50 Adc,

VGS = 5.0 Vdc)

QT

−

74

100

nC

Q1

−

13.6

−

Q2

−

44.8

−

Q3

−

35

−

SOURCE−DRAIN DIODE CHARACTERISTICS

Forward On−Voltage

(IS = 50 Adc, VGS = 0 Vdc)

(IS = 50 Adc, VGS = 0 Vdc, TJ = 125°C)

VSD

−

2.39

1.84

3.0

−

Vdc

Reverse Recovery Time

(See Figure 15)

(IS = 50 Adc, VGS = 0 Vdc,

dIS/dt = 100 A/ms)

trr

−

106

−

ns

ta

−

58

−

tb

−

48

−

Reverse Recovery Stored Charge

QRR

−

0.246

−

mC

INTERNAL PACKAGE INDUCTANCE

Internal Drain Inductance

(Measured from the drain lead 0.25

″ from package to center of die)

LD

−

3.5

−

nH

Internal Source Inductance

(Measured from the source lead 0.25

″ from package to source bond pad)

LS

−

7.5

−

nH

1. Pulse Test: Pulse Width

≤ 300 ms, Duty Cycle ≤ 2%.

2. Switching characteristics are independent of operating junction temperature.

3. Reflects typical values.

Cpk =

Max limit − Typ

3 x SIGMA

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