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37 page 
37 6430CS–ATARM–09-Apr-10 SAM3U Series Figure 10-1. System Controller Block Diagram Software Controlled Voltage Regulator ADC (front-end) Matrix SRAM Watchdog Timer Flash Peripherals Peripheral Bridge Zero-Power Power-on Reset Supply Monitor RTC Power Management Controller Embedded 32 kHz RC Oscillator Xtal 32 kHz Oscillator Supply Controller Embedded 12 / 8 / 4 MHz RC Oscillator Brownout Detector General Purpose Backup Registers Cortex-M3 Reset Controller Backup Power Supply Core Power Supply PLLA vr_standby rtc_alarm SLCK proc_nreset periph_nreset ice_nreset Master Clock MCK SLCK vddcore_nreset Main Clock MAINCK SLCK NRST MAINCK PLLACK FSTT0 - FSTT15(1) XIN32 XOUT32 osc32k_xtal_en XTALSEL Slow Clock SLCK osc32k_rc_en vddcore_nreset VDDIO VDDCORE VDDOUT ADVREF ADx FWUP bodcore_on bodcore_in RTT rtt_alarm SLCK XIN XOUT VDDBU VDDIN SHDN PIOx VDDANA USB VDDUTMI USBx bodbup_on bodbup_in supc_interrupt 3 - 20 MHz XTAL Oscillator WKUP0 - WKUP15 NRSTB PIOA/B/C Input / Output Buffers FSTT0 - FSTT15 are possible Fast Startup Sources, generated by WKUP0-WKUP15 Pins, but are not physical pins. UPLL MAINCK UPLLCK |
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