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STM6505SFAADG6F Datasheet(PDF) 7 Page - STMicroelectronics |
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STM6505SFAADG6F Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 29 page STM6502, STM6503, STM6504, STM6505 Description Doc ID 16101 Rev 5 7/29 Table 2. Signal names Symbol Input/ output Description RST Output Open-drain reset output, active-low. BLD Output Battery low detect output, active-low, open-drain. STM6505 only. SR0 Input Primary push-button Smart Reset input. Active-low, with or without internal 65 k Ω pull-up to VCC (product options). SR1 Input Secondary push-button Smart Reset input - combines with the primary push- button reset to provide setup delay time before reset. Active-low, with or without internal 65 k Ω pull-up to VCC (product options). SRE Input Secondary push-button Smart Reset input - provides instant Smart Reset. SRE is edge-triggered with a special debounce time (tDEBOUNCE = 240 ms min.) at the falling edge after a valid reset period. Active-high, no internal pull-up to VCC. STM6504 only. SRC Input Smart Reset input delay setup control: connect to an external capacitor to adjust the delay setup time (tSRC). STM6502 and STM6505 only. TSR Input A three-state Smart Reset input delay setup control. When connected to ground, tSRC = 2 s; when left open, tSRC = 6 s; when connected to VCC, tSRC = 10 s (all times are minimum). TSR is a DC-type input, intended to be either permanently grounded, permanently connected to VCC or permanently left open. If left open, for improved system glitch immunity it is strongly recommended to connect a 0.1 µF decoupling ceramic capacitor between the TSR and VSS pins. STM6503 and STM6504 only. VCC Supply Supply voltage input. Power supply for the device and an input for the monitored supply voltage. A 0.1 µF decoupling ceramic capacitor is recommended to be connected between the VCC and VSS pins. VBAT Input Battery voltage monitoring input. STM6505 only. VSS Supply Ground NC No connect (not bonded); should be connected to VSS. |
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