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23 page 
Flash Memory Characteristics 56F803 Technical Data, Rev. 16 Freescale Semiconductor 23 Figure 3-2 Input Signal Measurement References Figure 3-3 shows the definitions of the following signal states: • Active state, when a bus or signal is driven, and enters a low impedance state • Tri-stated, when a bus or signal is placed in a high impedance state • Data Valid state, when a signal level has reached VOL or VOH • Data Invalid state, when a signal level is in transition between VOL and VOH Figure 3-3 Signal States 3.4 Flash Memory Characteristics Table 3-5 Flash Memory Truth Table Mode XE1 1. X address enable, all rows are disabled when XE = 0 YE2 2. Y address enable, YMUX is disabled when YE = 0 SE3 3. Sense amplifier enable OE4 4. Output enable, tri-state Flash data out bus when OE = 0 PROG5 ERASE6 MAS17 NVSTR8 Standby L L L L L L L L Read H HHH L L L L Word Program H H L L H LLH Page Erase H L L L L H L H Mass Erase H L L L L H H H VIH VIL Fall Time Input Signal Note: The midpoint is VIL + (VIH – VIL)/2. Midpoint1 Low High 90% 50% 10% Rise Time Data Invalid State Data1 Data2 Valid Data Tri-stated Data3 Valid Data2 Data3 Data1 Valid Data Active Data Active |
