CAT6095VP2-GT4 datasheet(6/18 Pages) ONSEMI

Part #	CAT6095VP2-GT4

Description	Digital Output Temperature Sensor

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Manufacturer	ONSEMI [ON Semiconductor]

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CAT6095

Doc. No. MD-1124 Rev. D

6

Characteristics subject to change without notice

PIN DESCRIPTION

SCL: The Serial Clock input pin accepts the Serial

Clock generated by the Master (Host).

SDA: The Serial Data I/O pin receives input data

and transmits data stored in the internal registers. In

transmit mode, this pin is open drain. Data is

acquired on the positive edge, and is delivered on

the negative edge of SCL.

A0, A1 and A2: The Address pins set the device

address. These pins have on-chip pull-down

resistors.

EVENT

¯¯¯¯¯¯: The open-drain EVENT

¯¯¯¯¯¯ pin can be

programmed to signal over/under temperature limit

conditions.

POWER-ON RESET (POR)

The CAT6095 incorporates Power-On Reset (POR)

circuitry which monitors the supply voltage, and

then resets (initializes) the internal state machine

below (above) a POR trigger level of approximately

2.0 V, i.e. well below the minimum recommended

VCC value.

The TS powers-up into conversion mode. The

internal state machine will operate properly above

the POR trigger level, but valid temperature readings

can be expected only after the first conversion cycle

started and completed at nominal supply voltage.

DEVICE INTERFACE

The CAT6095 supports I

2C and SMBus data

transmission protocols. These protocols describe

serial communication between transmitters and

receivers sharing a 2-wire data bus. Data ﬂow is

controlled by a Master device, which generates the

serial clock and the START and STOP conditions.

The CAT6095 acts as a Slave device. Master and

Slave alternate as transmitter and receiver. Up to 8

CAT6095 devices may be present on the bus

simultaneously, and can be individually addressed

by matching the logic state of the address inputs A0,

A1, and A2.

I2C/SMBUS PROTOCOL

The I

2C/SMBus uses two ‘wires’, one for clock (SCL)

and one for data (SDA). The two wires are

connected to the VCC supply via pull-up resistors.

Master and Slave devices connect to the bus via

their respective SCL and SDA pins. The transmitting

device pulls down the SDA line to ‘transmit’ a ‘0’ and

releases it to ‘transmit’ a ‘1’.

Data transfer may be initiated only when the bus is

not busy (see A.C. Characteristics).

During data transfer, the SDA line must remain

stable while the SCL line is HIGH. An SDA transition

while SCL is HIGH will be interpreted as a START or

STOP condition (Figure 1).

START

The START condition precedes all commands. It

consists of a HIGH to LOW transition on SDA while

SCL is HIGH. The START acts as a ‘wake-up’ call to

all Slaves. Absent a START, a Slave will not

respond to commands.

STOP

The STOP condition completes all commands. It

consists of a LOW to HIGH transition on SDA while

SCL is HIGH. The STOP tells the Slave that no more

data will be written to or read from the Slave.

DEVICE ADDRESSING

The Master initiates data transfer by creating a START

condition on the bus. The Master then broadcasts an

8-bit serial Slave address. The ﬁrst 4 bits of the Slave

address (the preamble) select the Temperature Sensor

(TS preamble = 0011) as shown in Figure 2. The next

3 bits, A2, A1 and A0, select one of 8 possible TS

Slave devices. The last bit, R/W

¯¯, speciﬁes whether a

Read (1) or Write (0) operation is being performed

ACKNOWLEDGE

A matching Slave address is acknowledged (ACK)

by the Slave by pulling down the SDA line during the

9

th clock cycle (Figure 3). After that, the Slave will

acknowledge all data bytes sent to the bus by the

Master. When t he Slave is the transmitter, the

Master will in turn acknowledge data bytes in the 9

th

clock cycle. The Slave will stop transmitting after the

Master does not respond with acknowledge

(NoACK) and then issues a STOP. Bus timing is

illustrated in Figure 4.

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