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DSP56303 Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc |
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DSP56303 Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc |
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5 / 108 page  DSP56303 Technical Data, Rev. 11 Freescale Semiconductor 1-1 Signals/Connections 1 The DSP56303 input and output signals are organized into functional groups as shown in Table 1-1. Figure 1-1 diagrams the DSP56303 signals by functional group. The remainder of this chapter describes the signal pins in each functional group. Note: This chapter refers to a number of configuration registers used to select individual multiplexed signal functionality. Refer to the DSP56303 User’s Manual for details on these configuration registers. Table 1-1. DSP56303 Functional Signal Groupings Functional Group Number of Signals TQFP MAP-BGA Power (VCC) 18 18 Ground (GND) 19 66 Clock 22 PLL 33 Address bus Port A 1 18 18 Data bus 24 24 Bus control 13 13 Interrupt and mode control 55 Host interface (HI08) Port B2 16 16 Enhanced synchronous serial interface (ESSI) Ports C and D 3 12 12 Serial communication interface (SCI) Port E4 33 Timer 33 OnCE/JTAG Port 66 Notes: 1. Port A signals define the external memory interface port, including the external address bus, data bus, and control signals. 2. Port B signals are the HI08 port signals multiplexed with the GPIO signals. 3. Port C and D signals are the two ESSI port signals multiplexed with the GPIO signals. 4. Port E signals are the SCI port signals multiplexed with the GPIO signals. 5. There are 2 signal connections in the TQFP package and 7 signal connections in the MAP-BGA package that are not used. These are designated as no connect (NC) in the package description (see Chapter 3). |
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