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MCF51EM256 Datasheet(PDF) 8 Page - Freescale Semiconductor, Inc |
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MCF51EM256 Datasheet(HTML) 8 Page - Freescale Semiconductor, Inc |
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8 / 54 page  MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2 Preliminary—Subject to Change Without Notice MCF51EM256 Series Configurations Freescale Semiconductor 8 —6 μs typical wakeup time from stop3 mode • Clock source options — Two independent oscillators (XOSC1 and XOSC2) — loop-control Pierce oscillator; 32.768 kHz crystal or ceramic resonator. XOSC1 nominally supports the independent real time clock, and can be powered by a separate battery backup. XOSC2 is the primary external clock source for the ICS — Internal clock source (ICS) — internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference (XOSC1 or XOSC2); precision trimming of internal reference allowing 0.2% resolution and typical 0.5% to –1% deviation over temperature and voltage; supporting CPU frequencies from 4 kHz to 50 MHz • System protection — Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source or bus clock — Low voltage detection with reset or interrupt; selectable trip points; seperate low voltage warning with optional interrupt; selectable trip points — Illegal opcode and illegal address detection with reset — Flash block protection for each array to prevent accidental write/erasure — Hardware CRC module to support fast cyclic redundancy checks • Development support — Integrated ColdFire DEBUG_Rev_B+ interface with single wire BDM connection supports same electrical interface used by the S08 family debug modules — Real-time debug support with six hardware breakpoints (4 PC, 1 address and 1 data) — On-chip trace buffer provides programmable start/stop recording conditions • Peripherals — ADC16 — 4 analog-to-digital converters; the 100 pin version of the device has 1 dedicated differential channel and 1 dedicated single-ended channel per ADC, along with 3 muxed single-ended channels per ADC. The ADCs have 16-bit resolution, range compare function, 1.7 mV/ °C temperature sensor, internal bandgap reference channel, operate in stop3 and are fully functional from 3.6 V to 1.8 V — PDB — Programmable delay block with 16-bit counter and modulus and 3-bit prescaler; 8 trigger outputs for ADC16 modules (2 per ADC); provides periodic coordination of ADC sampling sequence with programmable sequence completion interrupt — IRTC — Ultra-low power independent real time clock with calendar features (IRTC); runs in all MCU modes; external clock source with trim capabilities (XOSC1); independent voltage source runs IRTC when MCU is powered-down; tamper detection and indicator; battery monitor output to ADC; unaffected by MCU resets — PRACMPx — Two analog comparators with selectable interrupt on rising, falling, or either edge of comparator output; compare option to programmable internal reference voltage; operation in stop3 — LCD — up to 288 segments (8 × 36); 160 segments (4 × 40); internal charge pump and option to provide internal reference voltage that can be trimmed for contrast control; flexible |
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