Input Driver Requirements

Output Load Considerations

Power Up

Enable and Disable

Pullup or Pulldown Resistors on I/O Lines

TXS0102

The continuous dc-current "sinking" capability is determined by the external system-level open-drain (or

push-pull) drivers that are interfaced to the TXS0102 I/O pins. Since the high bandwidth of these bidirectional I/O

circuits is used to facilitate this fast change from an input to an output and an output to an input, they have a

modest dc-current "sourcing" capability of hundreds of micro-Amps, as determined by the internal 10-k

Ω pullup

resistors.

TXS0102 data I/Os, as well as the capacitive loading on the data lines.

less than 50

Ω.

TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading

and to ensure that proper O.S. triggering takes place. PCB signal trace-lengths should be kept short enough

such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity

by ensuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay

on for approximately 30 ns. The maximum capacitance of the lumped load that can be driven also depends

directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is

load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the

capacitance that the TXS0102 output sees, so it is recommended that this lumped-load capacitance be

considered to avoid O.S. retriggering, bus contention, output signal oscillations, or other adverse system-level

affects.

the device during the power up operation, so either power supply can be ramped up first.

The TXS0102 has an OE input that is used to disable the device by setting OE low, which places all I/Os in the

circuitry to become operational after OE is taken high.

Each A-port I/O has an internal 10-k

levels, however. The internal pull-ups of the TXS0102 are disabled when the OE pin is low.

10

Submit Documentation Feedback

Copyright © 2007–2009, Texas Instruments Incorporated

Product Folder Link(s): TXS0102