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SN65LVDS3486A Datasheet(PDF) 6 Page - Texas Instruments |
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SN65LVDS3486A Datasheet(HTML) 6 Page - Texas Instruments |
6 / 15 page SN65LVDS32A, SN65LVDT32A, SN65LVDS3486A SN65LVDT3486A, SN65LVDS9637A, SN65LVDT9637A HIGHSPEED DIFFERENTIAL RECEIVERS SLLS368E − JULY 1999 − REVISED JUNE 2001 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT tPLH Propagation delay time, low-to-high-level output 2.5 4 6 ns tPHL Propagation delay time, high-to-low-level output 2.5 4 6 ns td1 Delay time, fail-safe deactivate time 6.1 ns td2 Delay time, fail-safe activate time CL = 10 pF, 0.3 1 µs tsk(p) Pulse skew (|tPHL1 – tPLH1|) CL = 10 pF, See Figure 3 200 ps tsk(o) Output skew§ See Figure 3 150 ps tsk(pp) Part-to-part skew‡ 1 ns tr Output signal rise time 600 ps tf Output signal fall time 600 ps tPHZ Propagation delay time, high-level-to-high-impedance output 5.5 9 ns tPLZ Propagation delay time, low-level-to-high-impedance output See Figure 4 4.4 9 ns tPZH Propagation delay time, high-impedance -to-high-level output See Figure 4 3.8 9 ns tPZL Propagation delay time, high-impedance-to-low-level output 7 9 ns † All typical values are at 25°C and with a 3.3 V supply. ‡ tsk(pp) is the magnitude of the time difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. § tsk(o) is the magnitude of the time difference between the tPLH or tPHL of all receivers of a single device with all of their inputs driven together. PARAMETER MEASUREMENT INFORMATION VID A B Y VO VIB VIA VIC (VIA + VIB)/2 IIB IIA VO Figure 1. Voltage and Current Definitions VID VO VIB VIA CL < 50 pF VID VO VIT− 1 µs VIT+ 2 µs −0.2 V 0.2 V Figure 2. VITH3 Input Voltage Threshold Test Circuit and Definitions |
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