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SN74LV245APWRG4 Datasheet(PDF) 2 Page - Texas Instruments |
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SN74LV245APWRG4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 22 page SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS382N − SEPTEMBER 1997 − REVISED APRIL 2005 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description/ordering information (continued) The ’LV245A devices are designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. terminal assignments 1234 A A1 DIR VCC OE B A3 B2 A2 B1 C A5 A4 B4 B3 D A7 B6 A6 B5 E GND A8 B8 B7 FUNCTION TABLE INPUTS OPERATION OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation logic diagram (positive logic) DIR OE A1 B1 To Seven Other Channels 1 2 19 18 Pin numbers shown are for the DB, DGV, DW, FK, J, NS, PW, RGY, and W packages. GQN PACKAGE (TOP VIEW) 1 234 A B C D E |
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