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DS32EL0124SQE Datasheet(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DS32EL0124SQE
Description  125 MHz- 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DS32EL0124SQE Datasheet(HTML) 6 Page - National Semiconductor (TI)

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LVCMOS Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. Applies to LT_EN, GPIO0, GPIO1,
GPIO2, RX_MUX_SEL, DC_B, RESET, RS, LOCK. (Note 2, Note 4, Note 5)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IH
High Level Input Voltage
2.0
V
DD
V
V
IL
Low Level Input Voltage
GND
0.8
V
V
OH
High Level Output Voltage
I
OH = -2mA
2.7
3.2
V
V
OL
Low Level Output Voltage
I
OL = 2mA
0.3V
V
V
CL
Input Clamp Voltage
I
CL = −18 mA
-0.9
−1.5
V
I
IN
Input Current
V
IN = 0.4V, 2.5V, or VDD33
-40
40
μA
I
OS
Output Short Circuit Current
V
OUT = 0V
(Note 6)
-45
mA
SMBus Electrical Specifications
Over recommended operating supply and temperature ranges unless otherwise specified. (Note 2, Note 5)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
SIL
Data, Clock Input Low Voltage
0.8
V
V
SIH
Data, Clock Input High Voltage
2.1
V
SDD
V
V
SDD
Nominal Bus Voltage
2.375
3.465
V
I
SLEAKB
Input Leakage Per Bus Segment
SCK and SDA pins
±200
µA
I
SLEAKP
Input Leakage Per Pin
±10
µA
C
SI
Capacitance for SDA and SCK
10
pF
SMBus Timing Specifications
Over recommended operating supply and temperature ranges unless otherwise specified. (Note 2, Note 5)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
f
SMB
Bus Operating Frequency
10
100
kHz
t
BUF
Bus free time between top and start condition
4.7
μs
t
HD:STA
Hold time after (repeated) start condition. After this
period, the first clock is generated
4.0
µs
t
SU:STA
Repeated Start Condition Setup Time
(Note 3)
4.7
µs
t
HD:DAT
Data Hold Time
300
ns
t
SU:DAT
Data Setup Time
(Note 3)
250
ns
t
LOW
Clock Low Time
4.7
µs
t
HIGH
Clock High Time
4.0
50
µs
t
SU:CS
SMB_CS Setup Time
(Note 3)
30
ns
t
HS:CS
SMB_CS Hold Time
(Note 3)
100
ns
t
POR
Time in which the device must be operational after
power on
(Note 3)
500
ms
www.national.com
6


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