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DAC8734SPFB Datasheet(PDF) 3 Page - Texas Instruments

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Part # DAC8734SPFB
Description  Quad, 16-Bit, High-Accuracy, 짹16V Output, Serial Input DIGITAL-TO-ANALOG CONVERTER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DAC8734SPFB Datasheet(HTML) 3 Page - Texas Instruments

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ELECTRICAL CHARACTERISTICS
DAC8734
www.ti.com .................................................................................................................................................. SBAS465A – MAY 2009 – REVISED SEPTEMBER 2009
All specifications at TA = TMIN to TMAX, AVDD = +11V to +18V, AVSS = –11V to –18V, VREF = REF-A = REF-B = +5V,
DVDD = +5V, IOVDD = +1.8V to DVDD, AGND = DGND = REFGND-A = REFGND-B = SGND-x = 0V, and DAC gain = 4, unless
otherwise noted.
DAC8734
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
STATIC PERFORMANCE
Bipolar Output
Resolution
16
Bits
Linearity error, INL
±1
LSB
Differential linearity error, DNL
±1
LSB
TA = +25°C, before user calibration
±4
LSB
Bipolar zero error(1)
TA = +25°C, after user calibration
(2)
±0.125
LSB
Bipolar zero error TC(2)
±0.5
ppm FSR/°C
TA = +25°C, before user calibration
±4
LSB
Gain error(1)
TA = +25°C, after user calibration
(2)
±1
LSB
Gain error TC(2)
±0.5
ppm FSR/°C
DC crosstalk(2)(3)
Output unloaded
±0.2
LSB
Unipolar Output
Resolution
16
Bits
Linearity error, INL
AVDD = +21V, AVSS = –11V
±1
LSB
Differential linearity error, DNL
AVDD = +21V, AVSS = –11V
±1
LSB
AVDD = +21V, AVSS = –11V, TA = +25°C, before user
±4
LSB
calibration
Zero error
AVDD = +21V, AVSS = –11V, TA = +25°C, after user
±0.125
LSB
calibration(2)
Zero error TC(2)
AVDD = +21V, AVSS = –11V
±0.2
ppm FSR/°C
AVDD = +21V, AVSS = –11V, TA = +25°C, before user
±4
LSB
calibration
Gain error
AVDD = +21V, AVSS = –11V, TA = +25°C, after user
±1
LSB
calibration(2)
Gain error TC(2)
AVDD = +21V, AVSS = –11V
±0.5
ppm FSR/°C
DC crosstalk(2)(3)
AVDD = +21V, AVSS = –11V, output unloaded
±0.2
LSB
ANALOG OUTPUT (VOUT-0 to VOUT-3)
AVDD = +16.5V, AVSS = –16.5V, VREF = +7.5V, gain = 4
–15
+15
V
Bipolar voltage output(4)
VREF = +5V, gain = 4
–10
+10
V
Unipolar voltage output(4)
AVDD = +21V, AVSS = –11V, VREF = +5V, gain = 4
0
+20
V
Operating for 500 hours at +25°C
2
ppm of FSR
Output voltage drift vs time
Operating for 1000 hours at +25°C
3
ppm of FSR
Output impedance(2)
±3mA load current
0.005
Short-circuit current(2)(5)
10
mA
Load current(4)
Output changes no more than ±1 LSB
±3
mA
Capacitive load stability(2)
700
pF
AVDD = +5V to +18V, AVSS = –5V to –18V,
Power-supply rejection(2)(4)
±0.3
LSB
DVDD = 5V ±10%, VREF = 2V
(1)
See the User Calibration for Zero-Code Error and Gain Error section for details.
(2)
Specified by design and characterization.
(3)
DC crosstalk is the dc change in the output of one channel as a result of a full-scale code change and subsequent output change on
another channel. The DAC outputs are buffered by op amps that share common AVDD and AVSS power supplies. Multiple VDD and VSS
terminals are provided to minimize dc crosstalk.
(4)
The analog output must not be greater than (AVDD – 1.0V) and must not be less than (AVSS + 1.0V).
(5)
When the output current is greater than the specification, the current is clamped at the specified maximum value.
Copyright © 2009, Texas Instruments Incorporated
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