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LTC2480CDD-TRPBF Datasheet(PDF) 6 Page - Linear Technology |
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LTC2480CDD-TRPBF Datasheet(HTML) 6 Page - Linear Technology |
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6 / 42 page  LTC2480 6 2480fc TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values are with respect to GND. Note 3: VCC = 2.7V to 5.5V unless otherwise specified. VREFCM = VREF/2, FS = 0.5VREF/GAIN VIN = IN+ – IN–, VIN(CM) = (IN+ + IN–)/2 Note 4: Use internal conversion clock or external conversion clock source with fEOSC = 307.2kHz unless otherwise specified. Note 5: Guaranteed by design, not subject to test. Note 6: Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. Note 7: 50Hz mode (internal oscillator) or fEOSC = 256kHz ±2% (external oscillator). Note 8: 60Hz mode (internal oscillator) or fEOSC = 307.2kHz ±2% (external oscillator). Note 9: Simultaneous 50Hz/60Hz mode (internal oscillator) or fEOSC = 280kHz ±2% (external oscillator). Note 10: The SCK can be configured in external SCK mode or internal SCK mode. In external SCK mode, the SCK pin is used as digital input and the driving clock is fESCK. In internal SCK mode, the SCK pin is used as digital output and the output clock signal during the data output is fISCK. Note 11: The external oscillator is connected to the fO pin. The external oscillator frequency, fEOSC, is expressed in kHz. Note 12: The converter uses the internal oscillator. Note 13: The output noise includes the contribution of the internal calibration operations. Note 14: Guaranteed by design and test correlation. Note 15: Refer to Applications Information section for performance vs data rate graphs. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tLESCK External SCK Low Period (Note 10) l 125 ns tHESCK External SCK High Period (Note 10) l 125 ns tDOUT_ISCK Internal SCK 24-Bit Data Output Time Internal Oscillator (Notes 10, 12) l 0.61 0.625 0.64 ms External Oscillator (Notes 10, 11) l 192/fEOSC (in kHz) ms tDOUT_ESCK External SCK 24-Bit Data Output Time (Note 10) l 24/fESCK (in kHz) ms t1 CS↓ to SDO Low l 0 200 ns t2 CS↑ to SDO High Z l 0 200 ns t3 CS↓ to SCK↓ Internal SCK Mode l 0 200 ns t4 CS↓ to SCK↑ External SCK Mode l 50 ns tKQMAX SCK ↓ to SDO Valid l 200 ns tKQMIN SDO Hold After SCK ↓ (Note 5) l 15 ns t5 SCK Set-Up Before CS ↓ l 50 ns t6 SCK Hold After CS ↓ l 50 ns t7 SDI Setup Before SCK ↑ (Note 5) l 100 ns t8 SDI Hold After SCK ↑ (Note 5) l 100 ns |
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