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IR3521 Datasheet(PDF) 4 Page - International Rectifier |
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IR3521 Datasheet(HTML) 4 Page - International Rectifier |
4 / 45 page IR3521 Page 4 V3.03 PIN# PIN SYMBOL PIN DESCRIPTION 20 SS/DEL1 Programs output 1 startup and over current protection delay timing. Connect an external capacitor to LGND to program. 21 IIN1 Output 1 average current input from the output 1 phase IC(s). This pin is also used to communicate over voltage condition to phase ICs. 22 VDRP1 Output 1 Buffered IIN1 signal. Connect an external RC network to FB1 to program converter output impedance. 23 ROSC/OVP Connect a resistor to LGND to program oscillator frequency and OCSET1, OCSET2, FB1, FB2, VDAC1, and VDAC2 bias currents. Oscillator frequency equals switching frequency per phase. The pin voltage is 0.6V during normal operation and higher than 1.6V if over-voltage condition is detected. 24 PSI_L Digital output to communicate the systems power state to phase ICs PSI_L pin. 25 CLKOUT Clock output at switching frequency multiplied by phase number. Connect to CLKIN pins of phase ICs. 26 PHSOUT Phase clock output at switching frequency per phase. Connect to PHSIN pin of the first phase IC. 27 PHSIN Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC. 28 VCCL Output of the voltage regulator, and power input for clock oscillator circuitry. Connect a decoupling capacitor to LGND. No external power rail connection is allowed. 29 VCCLFB Non-inverting input of the voltage regulator error amplifier. Output voltage of the regulator is programmed by the resistor divider connected to VCCL. 30 VCCLDRV Output of the VCCL regulator error amplifier to control external transistor. The pin senses 12V power supply through a resistor. 31 PGOOD Open collector output that drives low during startup and under any external fault condition. And it monitors output voltages, if any of the voltage planes fall out of spec, it will drive low. Connect external pull-up. ( Output voltage out of spec is defined as 350mV to 240mV below VDAC voltage ) 32 SVC SVC (Serial VID Clock) is an open drain output of the processor and input to IR3521, requires an external bias voltage and should not be floated EPAD LGND Local ground for internal circuitry and IC substrate connection. |
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