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dsPIC30F3012 Datasheet(PDF) 3 Page - Microchip Technology |
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dsPIC30F3012 Datasheet(HTML) 3 Page - Microchip Technology |
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3 / 206 page  © 2008 Microchip Technology Inc. DS70139F-page 3 dsPIC30F2011/2012/3012/3013 High-Performance Modified RISC CPU: • Modified Harvard architecture • C compiler optimized instruction set architecture • Flexible addressing modes • 83 base instructions • 24-bit wide instructions, 16-bit wide data path • Up to 24 Kbytes on-chip Flash program space • Up to 2 Kbytes of on-chip data RAM • Up to 1 Kbytes of nonvolatile data EEPROM • 16 x 16-bit working register array • Up to 30 MIPS operation: - DC to 40 MHz external clock input - 4 MHz - 10 MHz oscillator input with PLL active (4x, 8x, 16x) • Up to 21 interrupt sources: - 8 user-selectable priority levels - 3 external interrupt sources - 4 processor trap sources DSP Features: • Dual data fetch • Modulo and Bit-Reversed modes • Two 40-bit wide accumulators with optional saturation logic • 17-bit x 17-bit single-cycle hardware fractional/ integer multiplier • All DSP instructions are single cycle - Multiply-Accumulate (MAC) operation • single-cycle ±16 shift Peripheral Features: • High-current sink/source I/O pins: 25 mA/25 mA • Three 16-bit timers/counters; optionally pair up 16-bit timers into 32-bit timer modules • 16-bit Capture input functions • 16-bit Compare/PWM output functions • 3-wire SPI modules (supports four Frame modes) •I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing • Up to two addressable UART modules with FIFO buffers Analog Features: • 12-bit Analog-to-Digital Converter (ADC) with: - 200 ksps conversion rate - Up to 10 input channels - Conversion available during Sleep and Idle • Programmable Low-Voltage Detection (PLVD) • Programmable Brown-out Reset Special Microcontroller Features: • Enhanced Flash program memory: - 10,000 erase/write cycle (min.) for industrial temperature range, 100K (typical) • Data EEPROM memory: - 100,000 erase/write cycle (min.) for industrial temperature range, 1M (typical) • Self-reprogrammable under software control • Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Flexible Watchdog Timer (WDT) with on-chip low-power RC oscillator for reliable operation • Fail-Safe Clock Monitor operation: - Detects clock failure and switches to on-chip low-power RC oscillator • Programmable code protection • In-Circuit Serial Programming™ (ICSP™) • Selectable Power Management modes: - Sleep, Idle and Alternate Clock modes CMOS Technology: • Low-power, high-speed Flash technology • Wide operating voltage range (2.5V to 5.5V) • Industrial and Extended temperature ranges • Low-power consumption Note: This data sheet summarizes features of this group of dsPIC30F devices and is not intended to be a complete reference source. For more information on the CPU, peripherals, register descriptions and gen- eral device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/33F Programmer’s Reference Manual” (DS70157). High-Performance, 16-bit Digital Signal Controllers |
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