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R5F6421FKFB Datasheet(PDF) 4 Page - Renesas Technology Corp |
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R5F6421FKFB Datasheet(HTML) 4 Page - Renesas Technology Corp |
4 / 115 page REJ03B0237-0050 Rev.0.50 Jul 31, 2008 Page 2 of 111 Under development Preliminary Specification This is a preliminary specification and is subject to change. R32C/121 Group 1. Overview 1.1.2 Performance Overview Table 1.1 and Table 1.2 show the performance overview of the R32C/121 Group. Notes: 1. Please contact a Renesas sales office to use the non-E2dataFlash version. 2. Please contact a Renesas sales office to use the optional feature. Table 1.1 R32C/121 Group Performance (1/2) Unit Function Performance CPU Central processing unit R32C/100 Series CPU Core • Basic instructions: 108 • Minimum instruction execution time: 15.625 ns (f(CPU) = 64 MHz) • Multiplier: 32-bit × 32-bit 64-bit • Multiply-accumulate unit: 32-bit × 32-bit + 64-bit 64-bit • IEEE-754 floating point standard: Single precision • 32-bit barrel shifter • Operating mode: Single-chip mode Memory Flash memory: 128 to 512 Kbytes RAM: 12 to 32 Kbytes Data flash: 4 Kbytes × 2 blocks E2dataFlash: none (1)/4 Kbytes Refer to Table 1.3 for details Voltage Detector Low voltage detector Optional (2) Low voltage detection interrupt Clock Clock generator • 4 circuits (main clock, sub clock, PLL, on-chip oscillator) • Oscillation stop detector: Main clock oscillator stop/re-oscillation detection • Frequency divide circuit: Divide-by-2 to divide-by-24 selectable • Low power modes: Wait mode, stop mode Interrupts Interrupt vectors: 261 External interrupt inputs: NMI, INT × 6, key input × 4 Interrupt priority levels: 7 levels Watchdog Timer 15 bits × 1 (selectable input frequency from prescaler output) Automatic timer start function is available DMA DMAC 4 channels • Cycle-steal transfer mode • Request sources: 46 • 2 transfer modes: Single transfer, repeat transfer DMAC II • Can be activated by any peripheral interrupt source • 3 transfer functions: Immediate data transfer, calculation transfer, chained transfer I/O Ports Programmable I/O ports • 2 input-only ports • 84 CMOS inputs/outputs • A pull-up resistor is selectable for every 4 input ports |
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