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11AA011-EP Datasheet(PDF) 7 Page - Microchip Technology |
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11AA011-EP Datasheet(HTML) 7 Page - Microchip Technology |
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7 / 44 page  2010 Microchip Technology Inc. Preliminary DS22067H-page 7 11AAXXX/11LCXXX 3.0 BUS CHARACTERISTICS 3.1 Standby Pulse When the master has control of SCIO, a standby pulse can be generated by holding SCIO high for TSTBY. At this time, the 11XX will reset and return to Standby mode. Subsequently, a high-to-low transition on SCIO (the first low pulse of the header) will return the device to the active state. Once a command is terminated satisfactorily (i.e., via a NoMAK/SAK combination during the Acknowledge sequence), performing a standby pulse is not required to begin a new command as long as the device to be selected is the same device selected during the previ- ous command. However, a period of TSS must be observed after the end of the command and before the beginning of the start header. After TSS, the start header (including THDR low pulse) can be transmitted in order to begin the new command. If a command is terminated in any manner other than a NoMAK/SAK combination, then the master must per- form a standby pulse before beginning a new com- mand, regardless of which device is to be selected. An example of two consecutive commands is shown in Figure 3-1. Note that the device address is the same for both commands, indicating that the same device is being selected both times. A standby pulse cannot be generated while the slave has control of SCIO. In this situation, the master must wait for the slave to finish transmitting and to release SCIO before the pulse can be generated. If, at any point during a command, an error is detected by the master, a standby pulse should be generated and the command should be performed again. FIGURE 3-1: CONSECUTIVE COMMANDS EXAMPLE 3.2 Start Data Transfer All operations must be preceded by a start header. The start header consists of holding SCIO low for a period of THDR, followed by transmitting an 8-bit ‘ 01010101’ code. This code is used to synchronize the slave’s internal clock period with the master’s clock period, so accurate timing is very important. When a standby pulse is not required (i.e., between successive commands to the same device), a period of TSS must be observed after the end of the command and before the beginning of the start header. Figure 3-2 shows the waveform for the start header, including the required Acknowledge sequence at the end of the byte. FIGURE 3-2: START HEADER Note: After a POR/BOR event occurs, a low- to-high transition on SCIO must be gen- erated before proceeding with communi- cation, including a standby pulse. 11 0 1 0 1 00 Start Header SCIO Device Address 00 0 0 1 0 10 Standby Pulse(1) 11 0 1 0 1 00 Start Header SCIO Device Address 00 0 0 1 0 10 Note 1: After a POR/BOR event, a low-to-high transition on SCIO is required to occur before the first standby pulse. SCIO Data ‘0’ Data ‘1’ Data ‘0’ Data ‘1’ Data ‘0’ Data ‘1’ Data ‘0’ Data ‘1’ MAK NoSAK TSS THDR |
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Similar Description - 11AA011-EP |
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