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MAX17044G+T Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX17044G+T Datasheet(HTML) 7 Page - Maxim Integrated Products |
7 / 14 page Compact, Low-Cost 1S/2S Fuel Gauges with Low-Battery Alert _______________________________________________________________________________________ 7 IC Power-Up When the battery is first inserted into the system, there is no previous knowledge about the battery’s SOC. The IC assumes that the battery has been in a relaxed state for the previous 30min. The first A/D voltage measure- ment is translated into a best “first guess” for the SOC. Initial error caused by the battery not being in a relaxed state fades over time, regardless of cell loading follow- ing this initial conversion. Because the SOC determina- tion is convergent rather than divergent (as in a coulomb counter), this initial error does not have a long- lasting impact. Quick-Start A quick-start allows the MAX17043/MAX17044 to restart fuel-gauge calculations in the same manner as initial power-up of the IC. For example, if an application’s power-up sequence is exceedingly noisy such that excess error is introduced into the IC’s “first guess” of SOC, the host can issue a quick-start to reduce the error. A quick-start is initiated by a rising edge on the QSTRT pin, or through software by writing 4000h to the MODE register. ALERT Interrupt The MAX17043/MAX17044 have an interrupt feature that alerts a host microprocessor whenever the cell's state of charge, as defined by the SOC register, falls below a predefined alert threshold set at address 0Dh of the CONFIG register. When an alert is triggered, the IC drives the ALRT pin to logic-low and sets the ALRT bit in the CONFIG register to logic 1. The ALRT pin remains logic-low until the host software writes the ALRT bit to logic 0 to clear the inter- rupt. Clearing the ALRT bit while SOC is below the alert threshold does not generate another interrupt. The SOC register must first rise above and then fall below the alert threshold value before another interrupt is generated. Note that the alert function is not disabled at IC power- up. If the first SOC calculation is below the threshold setting, an interrupt is generated. Entering Sleep mode does not clear the interrupt. Sleep Mode Holding both SDA and SCL logic-low forces the MAX17043/MAX17044 into Sleep mode. While in Sleep mode, all IC operations are halted and power drain of the IC is greatly reduced. After exiting Sleep mode, fuel-gauge operation continues from the point it was halted. SDA and SCL must be held low for at least 2.5s to guarantee transition into Sleep mode. Afterwards, a rising edge on either SDA or SCL immediately transi- tions the IC out of Sleep mode. Alternatively, Sleep mode can be entered by setting the SLEEP bit in the CONFIG register to logic 1 through I2C communication. If the SLEEP bit is set to logic 1, the only way to exit Sleep mode is to write SLEEP to logic 0 or power-on reset the IC. Power-On Reset (POR) Writing a value of 5400h to the COMMAND register caus- es the MAX17043/MAX17044 to completely reset as if power had been removed. The reset occurs when the last bit has been clocked in. The IC does not respond with an I2C ACK after this command sequence. Registers All host interaction with the MAX17043/MAX17044 is handled by writing to and reading from register loca- tions. The MAX17043/MAX17044 have six 16-bit regis- ters: SOC, VCELL, MODE, VERSION, CONFIG, and COMMAND. Register reads and writes are only valid if all 16 bits are transferred. Any write command that is terminated early is ignored. The function of each regis- ter is described as follows. All remaining address loca- tions not listed in Table 1 are reserved. Data read from reserved locations is undefined. ADDRESS (HEX) REGISTER DESCRIPTION READ/ WRITE DEFAULT (HEX) 02h–03h VCELL Reports 12-bit A/D measurement of battery voltage. R — 04h–05h SOC Reports 16-bit SOC result calculated by ModelGauge algorithm. R — 06h–07h MODE Sends special commands to the IC. W — 08h–09h VERSION Returns IC version. R — 0Ch–0Dh CONFIG Battery compensation. Adjusts IC performance based on application conditions. R/W 971Ch FEh–FFh COMMAND Sends special commands to the IC. W — Table 1. Register Summary |
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