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HT45R35 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT45R35 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
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10 / 59 page  HT45R35 Rev. 1.30 10 May 14, 2010 Interrupt The devices provides two external interrupts, one inter- nal 8-bit timer/event counter interrupt and one external RC oscillation converter interrupt. The interrupt control register 0, INTC0, and interrupt control register 1, INTC1, both contain the interrupt control bits that are used to set the enable/disable and interrupt request flags. Once an interrupt subroutine is serviced, all the other in- terrupts will be blocked, as the EMI bit will be cleared au- tomatically. However this scheme may prevent further interrupt nesting. Other interrupt requests may happen during this interval but only the interrupt request flag is recorded. If a certain interrupt requires servicing within the service routine, the EMI bit and the corresponding bit of the INTC0 and INTC1 registers may be set to allow interrupt nesting. If the stack is full, the interrupt request will not be ac- knowledged, even if the related interrupt is enabled, un- til the Stack Pointer is decremented. If immediate service is desired, the stack must be prevented from be- coming full. All interrupts have a wake-up capability. As an interrupt is serviced, a control transfer occurs by pushing the pro- gram counter onto the stack, followed by a branch to a subroutine at a specified location in the program mem- ory. Only the program counter is pushed onto the stack. If the contents of the accumulator or status register are altered by the interrupt service program, this may cor- rupt the desired control sequence, therefore their con- tents should be saved in advance. External interrupts are triggered by an edge transition on pins INT0 or INT1. A configuration option enables these pins as interrupts and selects if they are active on high to low or low to high transitions. If active their re- lated interrupt request flag, EIF0; bit 4 in INTC0, and EIF1; bit 5 in INTC0, will be set. After the interrupt is en- abled, the stack is not full, and the external interrupt is active, a subroutine call to location ²04H² or ²08H² will occur. The interrupt request flags, EIF0 or EIF1, and the EMI bit will all be cleared to disable other interrupts. The internal Timer/Event Counter interrupt is initialised by setting the Timer/Event Counter interrupt request flag, TF; bit 6 in INTC0. A timer interrupt will be gener- ated when the timer overflows. After the interrupt is en- abled, and the stack is not full, and the TF bit is set, a subroutine call to location ²0CH² will occur. The related interrupt request flag, TF, is reset, and the EMI bit is cleared to disable other interrupts. The external RC oscillation converter interrupt is initial- ized by setting the external RC oscillation converter inter- rupt request flag, RCOCF; bit 4 of INTC1. This is caused by a Timer A or Timer B overflow. When the interrupt is enabled, and the stack is not full and the RCOCF bit is set, a subroutine call to location ²10H² will occur. The re- lated interrupt request flag, RCOCF, will be reset and the EMI bit cleared to disable further interrupts. During the execution of an interrupt subroutine, other in- terrupt acknowledgments are held until the ²RETI² in- struction is executed or the EMI bit and the related interrupt control bit are set to 1, if the stack is not full. To return from the interrupt subroutine, a ²RET² or ²RETI² instruction may be invoked. RETI will set the EMI bit to enable an interrupt service, but RET will not. Bit No. Label Function 0 EMI Controls the master (global) interrupt (1= enabled; 0= disabled) 1 EEI0 Controls the external interrupt 0 (1= enabled; 0= disabled) 2 EEI1 Controls the external interrupt 1 (1= enabled; 0= disabled) 3 ETI Controls the Timer/Event Counter interrupt (1= enabled; 0= disabled) 4 EIF0 External interrupt 0 request flag (1= active; 0= inactive) 5 EIF1 External interrupt 1 request flag (1= active; 0= inactive) 6 TF Internal Timer/Event Counter request flag (1= active; 0= inactive) 7 ¾ Unused bit, read as ²0² INTC0 (0BH) Register Bit No. Label Function 0 ERCOCI Controls the external RC oscillation converter interrupt (1= enabled; 0= disabled) 1~3, 5~7 ¾ Unused bit, read as ²0² 4 RCOCF External RC oscillation converter request flag (1= active; 0= inactive) INTC1 (1EH) Register |
Similar Part No. - HT45R35_10 |
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Similar Description - HT45R35_10 |
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