General Information

SDRAM

November 2007

Density

Bank

Part Number

Org.

Interface

Refresh

Power (V)

Package

Avail.

64Mb

K-die

4Banks

KS641632K

UI60/I75

UP60/P75

4M x 16

LVTTL

4K/64ms

3.3

Lead-free 54pin TSOP(II)

EOL

DEC.’08

64Mb

N-die

4Banks

KS641632N

LI60/I75

LP60/P75

4M x 16

LVTTL

4K/64ms

3.3

Lead-free & Halogen-free

54pin TSOP(II)

1Q’08

128Mb

I-die

4Banks

K4S281632I

UI60/I75

UP60/P75

8M x 16

LVTTL

4K/64ms

3.3

Lead-free 54pin TSOP(II)

EOL

AUG.’08

128Mb

K-die

4Banks

K4S281632K

UP60/P75

8M x 16

LVTTL

4K/64ms

3.3

Lead-free & Halogen-free

Now

256Mb

H-die

4Banks

K4S561632H

UI60/I75

UP60/P75

16M x 16

LVTTL

8K/64ms

3.3

Lead-free 54pin TSOP(II)

EOL

SEP.’08

256Mb

J-die

4Banks

K4S561632J

UP60/P75

16M x 16

LVTTL

8K/64ms

3.3

Lead-free & Halogen-free

Now

Note 2 :

- Industrial Temp (-40

°C < Ta < 85°C)

Temperature and Power

Description

I

Industrial Temperature, Normal Power

P

Industrial Temperature, Low Power

Note 1 :

U : TSOP(II) (Lead-free)

L : TSOP(II) (Lead-free & Halogen-free)

Note 3 :

Speed

Description

75

7.5ns, PC133 (133Mhz @ CL=3)

60

6.0 ns (166Mhz @ CL=3)

50

5.0 ns (200Mhz @ CL=3)

Note 4 : 128Mb K-die SDR and 256Mb J-die SDR DRAMs support Lead-free & Halogen-free package with Lead-free package code(-U)