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PSMN7R0-100PS Datasheet(PDF) 7 Page - NXP Semiconductors |
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PSMN7R0-100PS Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 16 page PSMN7R0-100PS_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 7 January 2010 7 of 16 NXP Semiconductors PSMN7R0-100PS N-channel 100V 6.8 m Ω standard level MOSFET in TO220 td(on) turn-on delay time VDS =50V; RL =2 Ω; VGS =10V; RG(ext) =4.7 Ω; Tj =25°C - 34.6 - ns tr rise time - 45.6 - ns td(off) turn-off delay time - 103.9 - ns tf fall time - 49.5 - ns Source-drain diode VSD source-drain voltage IS =25A; VGS =0V; Tj =25°C; see Figure 16 -0.8 1.2 V trr reverse recovery time IS =25A; dIS/dt = 100 A/µs; VGS =0V; VDS =50V -64 - ns Qr recovered charge - 167 - nC Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. Input and reverse transfer capacitances as a function of gate-source voltage; typical values 003a a d562 0 60 120 180 240 300 01 23 4 VDS (V) ID (A) 6 10 5 4.5 5.5 VGS (V) = 4 20 003a a d566 2000 4000 6000 8000 10000 12000 0 5 10 15 20 VGS (V) C (pF) Cis s Crs s |
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