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590T148M352DG Datasheet(PDF) 2 Page - Silicon Laboratories |
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590T148M352DG Datasheet(HTML) 2 Page - Silicon Laboratories |
2 / 12 page Si590/591 2 Preliminary Rev. 0.25 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter Symbol Test Condition Min Typ Max Units Supply Voltage1 VDD 3.3 V option 2.97 3.3 3.63 V 2.5 V option 2.25 2.5 2.75 1.8 V option 1.71 1.8 1.89 Supply Current IDD Output enabled LVPECL CML LVDS CMOS — — — — 110 100 90 80 125 110 100 90 mA Tristate mode — 60 75 Output Enable (OE)2 VIH 0.75 x VDD —— V VIL —— 0.5 Operating Temperature Range TA –40 — 85 ºC Notes: 1. Selectable parameter specified by part number. See Section 3. "Ordering Information" on page 6 for further details. 2. OE pin includes an internal 17 k pullup resistor to V DD for output enable active high or a 17 k pull-down resistor to GND for output enable active low. See 3. "Ordering Information" on page 6. Table 2. CLK± Output Frequency Characteristics Parameter Symbol Test Condition Min Typ Max Units Nominal Frequency1,2 fO LVPECL/LVDS/CML 10 — 525 MHz CMOS 10 — 160 Initial Accuracy fi Measured at +25 °C at time of shipping — ±1.5 — ppm Total Stability Note 3, second option code “C” — — ±30 ppm Note 4, second option code “B” — — ±50 ppm Note 4, second option code “A” — — ±100 ppm Temperature Stability second option code “C” — — ±20 ppm second option code “B” — — ±25 ppm second option code “A” — — ±50 ppm Powerup Time5 tOSC —— 10 ms Notes: 1. See Section 3. "Ordering Information" on page 6 for further details. 2. Specified at time of order by part number. 3. Includes initial accuracy, temperature, shock, vibration, power supply and load drift, and 10 years aging at 40 °C. See 3. "Ordering Information" on page 6. 4. Includes initial accuracy, temperature, shock, vibration, power supply and load drift, and 15 years aging at 70 °C. See 3. "Ordering Information" on page 6. 5. Time from powerup or tristate mode to fO. |
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