PMK35EP

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Product data sheet

Rev. 02 — 29 April 2010

2 of 12

NXP Semiconductors

PMK35EP

P-channel TrenchMOS extremely low level FET

2.

Pinning information

3.

Ordering information

4.

Limiting values

Table 2.

Pinning information

Pin

Symbol

Description

Simplified outline

Graphic symbol

1S

source

SOT96-1 (SO8)

2S

source

3S

source

4

G

gate

5

D

drain

6

D

drain

7

D

drain

8

D

drain

4

5

1

8

G

D

S

001aaa025

Table 3.

Ordering information

Type number

Package

Name

Description

Version

PMK35EP

SO8

plastic small outline package; 8 leads; body width 3.9 mm

SOT96-1

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

drain-source voltage

25 °C

---30

V

drain-gate voltage

25 °C

---30

V

gate-source voltage

-25

-

25

V

drain current

see Figure 3

---14.9

A

---7

A

peak drain current

see Figure 3

---28.8

A

total power dissipation

--6.9

W

storage temperature

-55

-

150

°C

junction temperature

-55

-

150

°C

Source-drain diode

source current

---5.8

A

peak source current

-

-

-23

A