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PHE13005 Datasheet(PDF) 2 Page - NXP Semiconductors |
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PHE13005 Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 12 page PHE13005_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 20 November 2009 2 of 12 NXP Semiconductors PHE13005 Silicon diffused power transistor 2. Ordering information 3. Limiting values Table 2. Ordering information Type number Package Name Description Version PHE13005 TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCESM collector-emitter peak voltage VBE =0V - 700 V VCBO collector-base voltage IE =0A - 700 V VCEO collector-emitter voltage IB =0A - 400 V IC collector current DC; see Figure 3, 1 and 2 -4 A ICM peak collector current - 8 A IB base current -2 A IBM peak base current - 4 A Ptot total power dissipation Tmb ≤ 25 °C; see Figure 4 -75 W Tstg storage temperature -65 150 °C Tj junction temperature - 150 °C Fig 1. Test circuit for reverse bias safe operating area Fig 2. Reverse bias safe operating area 001aab999 DUT LC LB IBon VBB VCC VCL(CE) probe point VCL(CE) (V) 0 800 600 200 400 003aad544 4 2 6 8 IC (A) 0 VBE = −5V |
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