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PCA9540B Datasheet(PDF) 5 Page - NXP Semiconductors

Part # PCA9540B
Description  2-channel I2C-bus multiplexer
Download  22 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9540B Datasheet(HTML) 5 Page - NXP Semiconductors

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PCA9540B_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 3 September 2009
5 of 22
NXP Semiconductors
PCA9540B
2-channel I2C-bus multiplexer
6.3 Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9540B in
a reset condition until VDD has reached VPOR. At this point, the reset condition is released
and the PCA9540B registers and I2C-bus state machine are initialized to their default
states (all zeroes), causing all the channels to be deselected. Thereafter, VDD must be
lowered below 0.2 V to reset the device.
6.4 Voltage translation
The pass gate transistors of the PCA9540B are constructed such that the VDD voltage can
be used to limit the maximum voltage that will be passed from one I2C-bus to another.
Figure 7 shows the voltage characteristics of the pass gate transistors (note that the graph
was generated using the data specified in Section 10 “Static characteristics” of this
data sheet). In order for the PCA9540B to act as a voltage translator, the Vo(sw) voltage
should be equal to, or lower than the lowest bus voltage. For example, if the main bus was
running at 5 V, and the downstream buses were 3.3 V and 2.7 V, then Vo(sw) should be
equal to or below 2.7 V to effectively clamp the downstream bus voltages. Looking at
Table 3.
Control register: Write—channel selection; Read—channel status
D7
D6
D5
D4
D3
B2
B1
B0
Command
XXXXX0
XXno channel selected
XXXXX
1
0
0
channel 0 enabled
XXXXX
1
0
1
channel 1 enabled
XXXXX1
1
X
no channel selected
00000000no channel selected;
power-up default state
(1) maximum
(2) typical
(3) minimum
Fig 7.
Pass gate voltage versus supply voltage
VDD (V)
2.0
5.5
4.5
3.0
4.0
002aaa964
3.0
2.0
4.0
5.0
Vo(sw)
(V)
1.0
3.5
5.0
2.5
(1)
(2)
(3)


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