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MC9S08JM16CLCE Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MC9S08JM16CLCE Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 386 page MC9S08JM16 Series Data Sheet, Rev. 2 10 Freescale Semiconductor 4.5 Flash ................................................................................................................................................47 4.5.1 Features .............................................................................................................................47 4.5.2 Program and Erase Times .................................................................................................47 4.5.3 Program and Erase Command Execution .........................................................................48 4.5.4 Burst Program Execution ..................................................................................................49 4.5.5 Access Errors ....................................................................................................................51 4.5.6 Flash Block Protection ......................................................................................................52 4.5.7 Vector Redirection ............................................................................................................53 4.6 Security ............................................................................................................................................53 4.7 Flash Registers and Control Bits .....................................................................................................54 4.7.1 Flash Clock Divider Register (FCDIV) ............................................................................55 4.7.2 Flash Options Register (FOPT and NVOPT) ....................................................................56 4.7.3 Flash Configuration Register (FCNFG) ...........................................................................57 4.7.4 Flash Protection Register (FPROT and NVPROT) ..........................................................57 4.7.5 Flash Status Register (FSTAT) ..........................................................................................58 4.7.6 Flash Command Register (FCMD) ...................................................................................59 Chapter 5 Resets, Interrupts, and System Configuration 5.1 Introduction .....................................................................................................................................61 5.2 Features ...........................................................................................................................................61 5.3 MCU Reset ......................................................................................................................................61 5.4 Computer Operating Properly (COP) Watchdog .............................................................................62 5.5 Interrupts .........................................................................................................................................63 5.5.1 Interrupt Stack Frame .......................................................................................................64 5.5.2 External Interrupt Request (IRQ) Pin ...............................................................................64 5.5.3 Interrupt Vectors, Sources, and Local Masks ...................................................................65 5.6 Low-Voltage Detect (LVD) System ................................................................................................67 5.6.1 Power-On Reset Operation ...............................................................................................67 5.6.2 LVD Reset Operation ........................................................................................................67 5.6.3 LVD Interrupt Operation ...................................................................................................68 5.6.4 Low-Voltage Warning (LVW) ...........................................................................................68 5.7 Reset, Interrupt, and System Control Registers and Control Bits ...................................................68 5.7.1 Interrupt Pin Request Status and Control Register (IRQSC) ............................................68 5.7.2 System Reset Status Register (SRS) .................................................................................69 5.7.3 System Background Debug Force Reset Register (SBDFR) ............................................70 5.7.4 System Options Register 1 (SOPT1) ................................................................................71 5.7.5 System Options Register 2 (SOPT2) ................................................................................72 5.7.6 System Device Identification Register (SDIDH, SDIDL) ................................................73 5.7.7 System Power Management Status and Control 1 Register (SPMSC1) ...........................74 5.7.8 System Power Management Status and Control 2 Register (SPMSC2) ...........................75 Chapter 6 Parallel Input/Output 6.1 Introduction .....................................................................................................................................77 |
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