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P89LV51RB2 Datasheet(PDF) 7 Page - NXP Semiconductors |
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P89LV51RB2 Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 76 page P89LV51RB2_RC2_RD2_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 15 December 2009 7 of 76 NXP Semiconductors P89LV51RB2/RC2/RD2 8-bit microcontrollers with 80C51 core P1.3/CEX0 43 5 I/O P1.3 — Port 1 bit 3. I/O CEX0 — Capture/compare external I/O for PCA Module 0. Each capture/compare module connects to a Port 1 pin for external I/O. When not used by the PCA, this pin can handle standard I/O. P1.4/SS/CEX1 44 6 I/O P1.4 — Port 1 bit 4. I SS — Slave port select input for SPI. I/O CEX1 — Capture/compare external I/O for PCA Module 1. P1.5/MOSI/ CEX2 1 7 I/O P1.5 — Port 1 bit 5. I/O MOSI — Master Output Slave Input for SPI. I/O CEX2 — Capture/compare external I/O for PCA Module 2. P1.6/MISO/ CEX3 2 8 I/O P1.6 — Port 1 bit 6. I/O MISO — Master Input Slave Output for SPI. I/O CEX3 — Capture/compare external I/O for PCA Module 3. P1.7/SPICLK/ CEX4 3 9 I/O P1.7 — Port 1 bit 7. I/O SPICLK — Serial clock input/output for SPI. I/O CEX4 — Capture/compare external I/O for PCA Module 4. P2.0 to P2.7 I/O with internal pull-up Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins are pulled HIGH by the internal pull-ups when ‘1’s are written to them and can be used as inputs in this state. As inputs, Port 2 pins that are externally pulled LOW will source current (IIL) because of the internal pull-ups. Port 2 sends the high-order address byte during fetches from external program memory and during accesses to external Data Memory that use 16-bit address (MOVX@DPTR). In this application, it uses strong internal pull-ups when transitioning to ‘1’s. Port 2 also receives some control signals and a partial of high-order address bits during the external host mode programming and verification. P2.0/A8 18 24 I/O P2.0 — Port 2 bit 0. O A8 — Address bit 8. P2.1/A9 19 25 I/O P2.1 — Port 2 bit 1. O A9 — Address bit 9. P2.2/A10 20 26 I/O P2.2 — Port 2 bit 2. O A10 — Address bit 10. P2.3/A11 21 27 I/O P2.3 — Port 2 bit 3. O A11 — Address bit 11. P2.4/A12 22 28 I/O P2.4 — Port 2 bit 4. O A12 — Address bit 12. P2.5/A13 23 29 I/O P2.5 — Port 2 bit 5. O A13 — Address bit 13. P2.6/A14 24 30 I/O P2.6 — Port 2 bit 6. O A14 — Address bit 14. Table 3. P89LV51RB2/RC2/RD2 pin description …continued Symbol Pin Type Description TQFP44 PLCC44 |
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