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LPC2194 Datasheet(PDF) 11 Page - NXP Semiconductors |
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LPC2194 Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 40 page LPC2194_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 December 2007 11 of 40 NXP Semiconductors LPC2194 Single-chip 16/32-bit microcontroller 6.5 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. FIQ has the highest priority. If more than one request is assigned to FIQ, the VIC combines the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ latency is achieved when only one request is classified as FIQ, because then the FIQ service routine can simply start dealing with that device. But if more than one request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC that identifies which FIQ source(s) is (are) requesting an interrupt. Fig 3. LPC2194 memory map AHB PERIPHERALS APB PERIPHERALS RESERVED ADDRESS SPACE BOOT BLOCK (RE-MAPPED FROM ON-CHIP FLASH MEMORY) RESERVED ADDRESS SPACE 16 kB ON-CHIP STATIC RAM RESERVED ADDRESS SPACE 256 kB ON-CHIP FLASH MEMORY 0xFFFF FFFF 0xF000 0000 0xEFFF FFFF 0xE000 0000 0xC000 0000 0xDFFF FFFF 0x8000 0000 0x7FFF FFFF 0x7FFF E000 0x7FFF DFFF 0x4000 4000 0x4000 3FFF 0x4000 0000 0x3FFF FFFF 0x0004 0000 0x0003 FFFF 4.0 GB 3.75 GB 3.5 GB 3.0 GB 2.0 GB 1.0 GB 0.0 GB 0x0000 0000 002aad180 |
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