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VRE3050C Datasheet(PDF) 6 Page - Cirrus Logic |
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VRE3050C Datasheet(HTML) 6 Page - Cirrus Logic |
6 / 6 page VRE3050 6 VRE3050DS P r o d u c t I n n o v a t i o n F r o m ® Figure 3. 5. TEMPERATURE PERFORMANCE The VRE3050 is designed for applications where the initial error at room temperature and drift over temperature are important to the user. For many instrument manufacturers, a voltage reference with a temperature coefficient less than 1 ppm/°C makes it possible to not perform a system temperature calibration, a slow and costly process. Of the three TC specification methods (slope, butterfly, and box), the box method is most commonly used. A box is formed by the min/max limits for the nominal output voltage over the operating temperature range. The equation follows: V NOMINAL x (TMAX – TMIN) V MAX – VMIN T.C. = x 106 This method corresponds more accurately to the method of test and provides a closer estimate of actual error than the other methods. The box method guarantees limits for the temperature error but does not specify the exact shape and slope of the device under test. A designer who needs a 14-bit accurate data acquisition system over the industrial temperature range (-40°C to +85°C), will need a voltage reference with a temperature coefficient (TC) of 1 ppm/°C if the reference is allowed to contribute an error equivalent to 1LSB. For 1/2LSB equivalent error from the reference you would need a volt- age reference with a temperature coefficient of 0.5 ppm/°C. Figure 4 shows the required reference TC vs. delta T change from 25°C for resolution ranging from 8 bits to 20 bits. 6. THERMAL HYSTERISIS A change in output voltage as a result of a temperature change. When references experience a temperature change and return to the initial temperature, they do not always have the same initial voltage. Thermal hysterisis is difficult to correct and is a major error source in systems that experience temperature changes greater than 25°C. Reference vendors are starting to include this important specification in their datasheets. PIN CONFIGURATION 0.01 0.1 1 10 100 1000 10000 0 0 1 0 1 1 20 BIT 18 BIT 16 BIT 14 BIT 12 BIT 10 BIT 8 BIT Reference TC vs. ∆T change from 25°C for 1 LSB change 5 6 7 8 VRE3050 TOP VIEW 1 2 3 4 N/C +VIN N/C GND NOISE REDUCTION VOUT TRIM N/C |
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