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BUK7230-55A Datasheet(PDF) 2 Page - NXP Semiconductors |
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BUK7230-55A Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 13 page BUK7230-55A_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 16 March 2010 2 of 13 NXP Semiconductors BUK7230-55A N-channel TrenchMOS standard level FET 2. Pinning information 3. Ordering information 4. Limiting values [1] Peak drain current is limited by chip, not package. Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1G gate SOT428 (DPAK) 2D drain 3S source mb D mounting base; connected to drain 3 2 mb 1 S D G mbb076 Table 3. Ordering information Type number Package Name Description Version BUK7230-55A DPAK plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 55 V VDGR drain-gate voltage RGS =20kΩ -55 V VGS gate-source voltage -20 20 V ID drain current Tmb =25°C; VGS =5V; see Figure 1 and 3 -38 A Tmb =100 °C; VGS =5V; see Figure 1 -27 A IDM peak drain current Tmb =25°C; tp ≤ 10 µs; pulsed; see Figure 3 [1] -150 A Ptot total power dissipation Tmb =25°C; see Figure 2 -88 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS source current Tmb =25°C - 38 A ISM peak source current tp ≤ 10 µs; pulsed; Tmb =25°C - 150 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID =34A; Vsup ≤ 55 V; RGS =50 Ω; VGS =10V; Tj(init) = 25 °C; unclamped -58 mJ |
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