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Timing Requirements

TPIC9201

MICROCONTROLLER POWER SUPPLY

AND MULTIPLE LOW-SIDE DRIVER

SLIS115D – APRIL 2005 – REVISED FEBRUARY 2008

MIN

TYP

MAX

UNIT

SPI frequency

4

MHz

T1

Delay time, NCS falling edge to SCLK rising edge

10

ns

T2

Delay time, NCS falling edge to SCLK falling edge

80

ns

T3

Pulse duration, SCLK high

60

ns

T4

Pulse duration, SCLK low

60

ns

T5

Delay time, last SCLK falling edge to NCS rising edge

80

ns

T6

Setup time, MOSI valid before SCLK edge

10

ns

T7

Hold time, MOSI valid after SCLK edge

10

ns

T8

Time between two words for transmitting

170

ns

The external capacitor is selected to provide a delay time, based on the current equation for a capacitor,

I = C(

Δv/Δt) and a 28-

µA typical output current.

Therefore, the user should select a 47-nF capacitor to provide a 6-ms delay at 3.55 V.

I = C(

Δv/Δt)

28

µA = C × (3.55 V/6 ms)

C = 47 nF

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