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Figure 1. PMP4979 Reference Design Schematic

Proper sequencing is ensured in the design with the use of a enable pins. As required, Core 1.2 V at 600

mA comes first, followed by Static 1.2 V + VRTC at 251 mA, Static 1.8 V at 230 mA which in turn enable

the LDO and hence at last Static 3.3 V at 115 mA comes up.

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High-Efficiency Power Solution Using DC/DC Converter With DVFS

SLVA341A – June 2009 – Revised May 2010

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