74LVC_LVCH16374A_7

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Product data sheet

Rev. 07 — 23 March 2010

10 of 19

NXP Semiconductors

74LVC16374A; 74LVCH16374A

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

11. Waveforms

Measurement points are given in Table 8.

Fig 7.

Clock (nCP) to output (nQn) propagation delays, clock pulse width, and the maximum frequency

001aaa256

nCP input

nQn output

GND

Measurement points are given in Table 8.

The shaded areas indicate when the input is permitted to change for predictable performance.

Fig 8.

Data set-up and hold times for the nDn input to the nCP input

001aaa257

GND

GND

nQn output

nCP input

nDn input