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74LVC3G04DP Datasheet(PDF) 2 Page - NXP Semiconductors |
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74LVC3G04DP Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 16 page  74LVC3G04_7 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 07 — 16 June 2008 2 of 16 NXP Semiconductors 74LVC3G04 Triple inverter 3. Ordering information 4. Marking 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC3G04DP −40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC3G04DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVC3G04GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74LVC3G04GD −40 °C to +125 °C XSON8U plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 3 × 2 × 0.5 mm SOT996-2 74LVC3G04GM −40 °C to +125 °C XQFN8U plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 × 1.6 × 0.5 mm SOT902-1 Table 2. Marking codes Type number Marking code 74LVC3G04DP V04 74LVC3G04DC V04 74LVC3G04GT V04 74LVC3G04GD V04 74LVC3G04GM V04 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one driver) 001aah793 1A 1Y 2A 2Y 3A 3Y 1 1 001aah794 1 mna110 A Y |
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