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74AUP2G240 Datasheet(PDF) 11 Page - NXP Semiconductors |
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74AUP2G240 Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 20 page 74AUP2G240_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 30 June 2009 11 of 20 NXP Semiconductors 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state [1] All typical values are measured at nominal VCC. [2] tpd is the same as tPLH and tPHL. [3] ten is the same as tPZH and tPZL. [4] tdis is the same as tPHZ and tPLZ. [5] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. 12. Waveforms CL = 5 pF, 10 pF, 15 pF and 30 pF CPD power dissipation capacitance f = 1 MHz; VI = GND to VCC [5] VCC = 0.8 V - 2.7 - - - - pF VCC = 1.1 V to 1.3 V - 2.9 - - - - pF VCC = 1.4 V to 1.6 V - 3.0 - - - - pF VCC = 1.65 V to 1.95 V - 3.2 - - - - pF VCC = 2.3 V to 2.7 V - 3.7 - - - - pF VCC = 3.0 V to 3.6 V - 4.2 - - - - pF Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground=0V; for test circuit see Figure 9. Symbol Parameter Conditions 25 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max (85 °C) Max (125 °C) Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. The data input (nA) to output (nY) propagation delays mna960 tPLH tPHL VM VM VM VM nY output nA input VI GND VOH VOL Table 9. Measurement points Supply voltage Output Input VCC VM VM VI tr = tf 0.8 V to 3.6 V 0.5 × V CC 0.5 × V CC VCC ≤ 3.0 ns |
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