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X28HC256FM-12 Datasheet(PDF) 5 Page - Xicor Inc. |
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X28HC256FM-12 Datasheet(HTML) 5 Page - Xicor Inc. |
5 / 24 page X28HC256 5 LOAD ACCUM FROM ADDR n COMPARE ACCUM WITH ADDR n X28HC256 READY COMPARE OK? NO YES LAST WRITE YES THE TOGGLE BIT I/O6 Figure 4. Toggle Bit Bus Sequence CE OE WE I/O6 X28HC256 READY VOH VOL LAST WRITE HIGH Z * I/O6 beginning and ending state of I/O6 will vary. * * 3859 FHD F14 Figure 5. Toggle Bit Software Flow The Toggle Bit can eliminate the software housekeeping chore of saving and fetching the last address and data written to a device in order to implement DATA Polling. This can be especially helpful in an array comprised of multiple X28HC256 memories that is frequently up- dated. The timing diagram in Figure 4 illustrates the sequence of events on the bus. The software flow diagram in Figure 5 illustrates a method for polling the Toggle Bit. 3859 FHD F15 |
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