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ADIS16135BMLZ Datasheet(PDF) 9 Page - Analog Devices

Part # ADIS16135BMLZ
Description  Precision Angular Rate Sensor
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
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ADIS16135BMLZ Datasheet(HTML) 9 Page - Analog Devices

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ADIS16135
Rev. 0 | Page 9 of 20
OUTPUT DATA REGISTERS
Table 8. Output Data Register Formats
Register
Address
Measurement
TEMP_OUT
0x02
Internal temperature
GYRO_OUT2
0x04
Gyroscope, lower 16 bits
GYRO_OUT
0x06
Gyroscope, upper 16 bits
Rotation Rate (Gyroscope)
GYRO_OUT is the primary register for gyroscope output data
and uses 16-bit twos complement format for its data. Table 9
provides the numerical format, and Table 10 provides several
examples for converting digital data into °/sec.
Table 9. GYRO_OUT Bit Descriptions
Bits
Description
[15:0]
Gyroscope data; twos complement,
0.0125°/sec per LSB, 0°/sec = 0x0000
Table 10. GYRO_OUT, Twos Complement Format
Rotation Rate
Decimal
Hex
Binary
+300°/sec
+24,000
0x5DC0
0101 1101 1100 0000
+0.025°/sec
+2
0x0002
0000 0000 0000 0010
+0.0125°/sec
+1
0x0001
0000 0000 0000 0001
0°/sec
0
0x0000
0000 0000 0000 0000
−0.0125°/sec
−1
0xFFFF
1111 1111 1111 1111
−0.025°/sec
−2
0xFFFE
1111 1111 1111 1110
−300°/sec
−24,000
0xA240
1010 0010 0100 0000
The GYRO_OUT2 register (see Table 11) captures the bit growth
associated with the decimation filter shown in Figure 18, using
a MSB-justified format. The bit growth starts with the MSB
(GYRO_OUT2[15]), is equal to the decimation rate setting in
DEC_RATE[4:0] (see Table 18), and grows in the LSB direction
as the decimation rate increases. See Figure 14 for more details.
Table 11. GYRO_OUT2 Bit Descriptions
Bits
Description
[15:0]
Rotation rate data; resolution enhancement bits
GYROSCOPE DATA
NOT USED
D
15
0 15
0
D = DEC_RATE[4:0]
BIT WEIGHT =
0.0125
2D
LSB = GYRO_OUT2[16-D]
°/sec
LSB
GYRO_OUT
GYRO_OUT2
Figure 14. Gyroscope Output Format, DEC_RATE[4:0] > 0
Internal Temperature
The TEMP_OUT register (see Table 12) provides an internal
temperature measurement that can be useful for observing
relative temperature changes in the environment. Table 13
provides several coding examples for converting the 16-bit
twos complement number into units for temperature (°C).
Table 12. TEMP_OUT Bit Descriptions
Bits
Description
[15:0]
Temperature data; twos complement, 0.058°C per LSB,
0°C = 0x0000
Table 13. Temperature, Twos Complement Format
Temperature
Decimal
Hex
Binary
+105°C
+1810
0x712
0000 0111 0001 0010
+0.116°C
+2
0x0002
0000 0000 0000 0010
+0.058°C
+1
0x0001
0000 0000 0000 0001
0°C
0
0x0000
0000 0000 0000 0000
−0.058°C
−1
0xFFFF
1111 1111 1111 1111
−0.116°C
−2
0xFFFE
1111 1111 1111 1110
−40°C
−690
0xFD4E
1111 1101 0100 1110
DEVICE CONFIGURATION
The control registers listed in Table 14 provide a variety of user
configuration options. The SPI provides access to these registers,
one byte at a time, using the bit assignments shown in Figure 13.
Each register has 16 bits, where Bits[7:0] represent the lower
address and Bits[15:8] represent the upper address. Figure 15
provides an example of writing 0x03 to Address 0x22
(DEC_RATE[7:0]), using DIN = 0xA203. This example reduces
the sample rate by a factor of 8 (see Table 16).
DIN = 1010 0010 0000 0011 = 0xA203, WRITES 0x03 TO ADDRESS 0x22
SCLK
DIN
CS
Figure 15. SPI Sequence for Setting the Decimate Rate to 8 (DIN = 0xA203)
Dual Memory Structure
Writing configuration data to a control register updates its SRAM
contents, which are volatile. After optimizing each relevant control
register setting in a system, set GLOB_CMD[3] = 1 (DIN =
0xA808) to back these settings up in nonvolatile flash memory.
The flash backup process requires a valid power supply level for
the entire 72 ms process time. Table 14 provides a user register
memory map that includes a column of flash backup information.
A yes in this column indicates that a register has a mirror location
in flash and, when backed up properly, automatically restores itself
during startup or after a reset. Figure 16 provides a diagram of the
dual-memory structure used to manage operation and store critical
user settings.
NONVOLATILE
FLASH MEMORY
(NO SPI ACCESS)
MANUAL
FLASH
BACKUP
START-UP
RESET
VOLATILE
SRAM
SPI ACCESS
Figure 16. SRAM and Flash Memory Diagram


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