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X40015S8I-C Datasheet(PDF) 4 Page - Xicor Inc. |
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X40015S8I-C Datasheet(HTML) 4 Page - Xicor Inc. |
4 / 25 page X40010/X40011/X40014/X40015 – Preliminary Characteristics subject to change without notice. 4 of 25 REV 1.3.4 7/12/02 www.xicor.com Figure 2. VTRIPX Set/Reset Conditions WATCHDOG TIMER The Watchdog Timer circuit monitors the microproces- sor activity by monitoring the SDA and SCL pins. The microprocessor must toggle the SDA pin HIGH to LOW periodically, while SCL also toggles from HIGH to LOW (this is a start bit) followed by a stop condition prior to the expiration of the watchdog time out period to pre- vent a WDO signal going active. The state of two non- volatile control bits in the Status Register determines the watchdog timer period. The microprocessor can change these watchdog bits by writing to the X40010/ 11/14/15 control register (also refer to page 19). Figure 3. Watchdog Restart V1 AND V2 THRESHOLD PROGRAM PROCEDURE (OPTIONAL) The X40010/11/14/15is shipped with standard V1 and V2 threshold (VTRIP1, VTRIP2) voltages. These values will not change over normal operating and storage con- ditions. However, in applications where the standard thresholds are not exactly right, or if higher precision is needed in the threshold value, the X40010/11/14/15trip points may be adjusted. The procedure is described below, and uses the application of a high voltage control signal. Setting a VTRIPx Voltage (x=1, 2) There are two procedures used to set the threshold voltages (VTRIPx), depending if the threshold voltage to be stored is higher or lower than the present value. For example, if the present VTRIPx is 2.9 V and the new VTRIPx is 3.2 V, the new voltage can be stored directly into the VTRIPx cell. If however, the new setting is to be lower than the present setting, then it is necessary to “reset” the VTRIPx voltage before setting the new value. Setting a Higher VTRIPx Voltage (x=1, 2) To set a VTRIPx threshold to a new voltage which is higher than the present threshold, the user must apply the desired VTRIPx threshold voltage to the corre- sponding input pin Vcc(V1MON), or V2MON. The Vcc(V1MON) and V2MON must be tied together during this sequence. Then, a programming voltage (Vp) must be applied to the WDO pin before a START condition is set up on SDA. Next, issue on the SDA pin the Slave Address A0h, followed by the Byte Address 01h for VTRIP1 and 09h for VTRIP2, and a 00h Data Byte in order to program VTRIPx. The STOP bit following a valid write operation initiates the programming sequence. Pin WDO must then be brought LOW to complete the operation. Note: This operation does not corrupt the memory array. VCC/V2MON VTRIPX VP tWC A0h 0 7 70 7 0 SCL WDO SDA (X = 1, 2) 00h SCL SDA .6µs 1.3µs Timer Start |
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