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X40014S8-B Datasheet(PDF) 3 Page - Xicor Inc. |
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X40014S8-B Datasheet(HTML) 3 Page - Xicor Inc. |
3 / 25 page X40010/X40011/X40014/X40015 – Preliminary Characteristics subject to change without notice. 3 of 25 REV 1.3.4 7/12/02 www.xicor.com PRINCIPLES OF OPERATION Power On Reset Application of power to the X40010/11/14/15 activates a Power On Reset Circuit that pulls the RESET/RESET pins active. This signal provides several benefits. – It prevents the system microprocessor from starting to operate with insufficient voltage. – It prevents the processor from operating prior to stabili- zation of the oscillator. – It allows time for an FPGA to download its configuration prior to initialization of the circuit. – It prevents communication to the EEPROM, greatly reducing the likelihood of data corruption on power up. When VCC exceeds the device VTRIP1 threshold value for tPURST (selectable) the circuit releases the RESET (X40011) and RESET (X40010) pin allowing the system to begin operation. Low Voltage VCC (V1 Monitoring) During operation, the X40010/11/14/15 monitors the VCC level and asserts RESET/RESET if supply voltage falls below a preset minimum VTRIP1. The RESET/RESET signal prevents the microprocessor from operating in a power fail or brownout condition. The V1FAIL signal remains active until the voltage drops below 1V. It also remains active until VCC returns and exceeds VTRIP1 for tPURST. Low Voltage V2 Monitoring The X40010/11/14/15 also monitors a second voltage level and asserts V2FAIL if the voltage falls below a preset minimum VTRIP2. The V2FAIL signal is either ORed with RESET to prevent the microprocessor from operating in a power fail or brownout condition or used to interrupt the microprocessor with notification of an impending power failure. For the X40010/11 the V2FAIL signal remains active until the VCC drops below 1V (VCC falling). It also remains active until V2MON returns and exceeds VTRIP2 by 0.2V. This voltage sense circuitry monitors the power supply connected to the V2MON pin. If VCC = 0, V2MON can still be monitored. For the X40014/15 devices, the V2FAIL signal remains actice until VCC drops below 1Vx and remains active until V2MON returns and exceeds VTRIP2. This sense circuitry is powered by VCC. If VCC = 0, V2MON cannot be moni- tored. Figure 1. Two Uses of Multiple Voltage Monitoring 6–10V VCC 5V Reg V2MON X40011-A Resistors selected so 3V appears on V2MON when unregulated supply reaches 6V. Unreg. Supply VCC X40014-C RESET V2FAIL System VCC Reset RESET V2FAIL VCC System Reset Notice: No external components required to monitor two voltages. 1M 1M V2MON 3.3V Reg 1.2V Reg V2MON (2.9V) 5 7 SDA Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. This pin requires a pull up resistor and the input buffer is always active (not gated). Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this tran- sition within the watchdog time out period results in WDO going active. 6 8 SCL Serial Clock. The Serial Clock controls the serial bus timing for data input and output. 7 1 WDO WDO Output. WDO is an active LOW, open drain output which goes active whenever the watchdog timer goes active. 82 VCC Supply Voltage PIN DESCRIPTION (Continued) Pin Name Function SOIC TSSOP |
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