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X88C64 Datasheet(PDF) 2 Page - Xicor Inc. |
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X88C64 Datasheet(HTML) 2 Page - Xicor Inc. |
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2 / 14 page  X88C64 2 PIN DESCRIPTIONS Address/Data (A/D0–A/D7) Multiplexed low-order addresses and data. The Ad- dresses flow into the device while ALE is HIGH. After ALE transitions from a HIGH to LOW the addresses are latched. Once the addresses are latched these pins input data or output data depending on RD, WR, PSEN, and CE. Addresses (A8–A12) High order addresses flow into the device when ALE is HIGH and are latched when ALE goes LOW. Chip Enable ( CE) The Chip Enable input must be LOW to enable all read/write operations. When CE is HIGH and ALE is LOW, the X88C64 is placed in the low power standby mode. Program Store Enable ( PSEN) When the X88C64 is to be used in a 8051 based system, PSEN is tied directly to the microcontroller’s PSEN output. Read ( RD) When the X88C64 is to be used in a 8051 based system, RD is tied directly to the microcontroller’s RD output. Write ( WR) When the X88C64 is to be used in a 8051 based system, WR is tied directly to the microcontroller’s WR output. Address Latch Enable (ALE) Addresses flow through the latches to address de- coders when ALE is HIGH and are latched when ALE transitions from a HIGH to LOW. Write Control ( WC) The Write Control allows external circuitry to abort a page load cycle once it has been initiated. This input is useful in applications in which a power failure or processor RESET could interrupt a page load cycle. In this case, the microcontroller might drive all signals HIGH, causing bad data to be latched into the E2PROM. If the Write Control input is driven HIGH (before tBLC Max) after Write (WR) goes HIGH, the write cycle will be aborted. When WC is LOW (tied to VSS) the X88C64 will be enabled to perform write operations. When WC is HIGH normal read operations may be performed, but all attempts to write to the device will be disabled. PIN CONFIGURATION 3867 FHD F01 PIN NAMES Symbol Description ALE Address Latch Enable A/D0–A/D7 Address Inputs/Data I/O A8–A12 Address Inputs RD Read Input WR Write Input PSEN Program Store Enable Input CE Chip Enable WC Write Control VSS Ground VCC Supply Voltage NC No Connect 3867 PGM T01.1 NC A12 NC NC WC PSEN A/D0 A/D1 A/D2 A/D3 A/D4 VSS 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC WR ALE A8 A9 A11 RD A10 CE A/D7 A/D6 A/D5 X88C64 DIP/SOIC |
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