300mA Low-Noise LDO Regulators ( 10 Page)
7 of 10
Regulator Input. Supply voltage can range from +2.5V to +5.5V. Bypass with 1µF to GND.
Ground. This pin also functions as a heatsink. Solder to large pads or the circuit board ground plane
to maximize thermal dissipation.
Active-High Enable Input. A logic low reduces the supply current to less than 1µA. Connect to IN for
This is a reference bypass pin. It should connect external 10nF capacitor to GND to reduce output
noise. Bypass capacitor must be no less than 1nF. (C
Regulator Output. Sources up to 150mA. Bypass with a 1µF, < 0.2
Ω typical ESR capacitor to GND.
The block diagram of the SS8014-xx is shown in Figure 1.
It consists of an error amplifier, 1.25V bandgap reference,
PMOS output transistor, internal feedback voltage divider,
shutdown logic, over current protection circuit, and over
temperature protection circuit.
The internal feedback voltage divider’s central tap is
connected to the non-inverting input of the error amplifier.
The error amplifier compares non-inverting input with the
1.25V bandgap reference. If the feedback voltage is
higher than 1.25V, the error amplifier’s output becomes
higher so that the PMOS output transistor has a smaller
gate-to-source voltage (V
). This reduces the current
carrying capability of the PMOS output transistor, as a
result the output voltage decreases until the feedback
voltage is equal to 1.25V. Similarly, when the feedback
voltage is less than 1.25V, the error amplifier causes the
output PMOS to conduct more current to pull the feed-
back voltage up to 1.25V. Thus, through this feedback
action, the error amplifier, output PMOS, and the volt-
age-divider effectively form a unity-gain amplifier with the
feedback voltage forced to be the same as the 1.25V
bandgap reference. The output voltage, V
, is then
given by the following equation:
= 1.25 (1 + R1/R2).
Alternatively, the relationship between R1 and R2 is given
R1 = R2 (V
/ 1.25 + 1).
Figure 1. Functional Diagram
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