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X24165VM Datasheet(PDF) 6 Page - Xicor Inc. |
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X24165VM Datasheet(HTML) 6 Page - Xicor Inc. |
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6 / 17 page  X24165 6 Figure 6. Page Write Page Write The X24165 is capable of a 32 byte page write opera- tion. It is initiated in the same manner as the byte write operation, but instead of terminating the write cycle af- ter the first data word is transferred, the master can transmit up to fifteen more words. After the receipt of each word, the X24165 will respond with an acknowl- edge. After the receipt of each word, the five low order ad- dress bits are internally incremented by one. The high order bits of the word address remain constant. If the master should transmit more than 32 words prior to generating the stop condition, the address counter will “roll over” and the previously written data will be over- written. As with the byte write operation, all inputs are disabled until completion of the internal write cycle. Re- fer to Figure 6 for the address, acknowledge and data transfer sequence. Acknowledge Polling The Max Write Cycle Time can be significantly reduced using Acknowledge Polling. To initiate Acknowledge Polling, the master issues a start condition followed by the Slave Address Byte for a write or read operation. If the device is still busy with the high voltage cycle, then no ACK will be returned. If the device has completed the write operation, an ACK will be returned and the host can then proceed with the read or write operation. Refer to Flow 1. Flow 1. ACK Polling Sequence 6551 ILL F09 WRITE OPERATION COMPLETED ENTER ACK POLLING ISSUE START ISSUE SLAVE ADDRESS AND R/W = 0 ACK RETURNED? NEXT OPERATION A WRITE? ISSUE BYTE ADDRESS PROCEED ISSUE STOP NO YES YES PROCEED ISSUE STOP NO BUS ACTIVITY: MASTER SDA LINE BUS ACTIVITY: X24165 S T A R T SLAVE ADDRESS S S T O P P A C K A C K A C K A C K A C K WORD ADDRESS (n) DATA n DATA n+1 DATA n+31 6551 ILL F10.1 |
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