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X24042PI-2.7 Datasheet(PDF) 10 Page - Xicor Inc. |
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X24042PI-2.7 Datasheet(HTML) 10 Page - Xicor Inc. |
10 / 15 page X24042 10 Note: (4) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. These param- eters are periodically sampled and not 100% tested. 3849 FHD F04 tSU:STA tHD:STA tHD:DAT tSU:DAT tLOW tSU:STO tR tBUF SCL SDA IN SDA OUT tDH tAA tF tHIGH Bus Timing POWER-UP TIMING Symbol Parameter Max. Units tPUR(4) Power-Up to Read Operation 1 ms tPUW(4) Power-Up to Write Operation 5 ms 3849 PGM T08 A.C. CHARACTERISTICS LIMITS (Over recommended operating conditions, unless otherwise specified). READ & WRITE CYCLE LIMITS Symbol Parameter Min. Max. Units tSCL SCL Clock Frequency 0 100 KHz tI Noise Suppression Time Constant at SCL, SDA Inputs 100 ns tAA SCL Low to SDA Data Out Valid 0.3 3.5 µs tBUF Time the Bus Must Be Free Before a 4.7 µs New Transmission Can Start tHD:STA Start Condition Hold Time 4.0 µs tLOW Clock Low Period 4.7 µs tHIGH Clock High Period 4.0 µs tSU:STA Start Condition Setup Time 4.7 µs tHD:DAT Data In Hold Time 0 µs tSU:DAT Data In Setup Time 250 ns tR SDA and SCL Rise Time 1 µs tF SDA and SCL Fall Time 300 ns tSU:STO Stop Condition Setup Time 4.7 µs tDH Data Out Hold Time 300 ns 3849 PGM T07 A.C. CONDITIONS OF TEST Input Pulse Levels VCC x 0.1 to VCC x 0.9 Input Rise and Fall Times 10ns I/O Timing Levels VCC x 0.5 3849 PGM T06 3849 FHD F03 EQUIVALENT A.C. LOAD CIRCUIT 5.0V 1533 Ω 100pF Output |
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